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authorDave Airlie <[email protected]>2017-12-21 16:23:30 +1000
committerDave Airlie <[email protected]>2017-12-22 14:10:04 +1000
commit821b5379f04cc536de714d0898b1cff25c46b5b9 (patch)
tree84672a044edb11a364d6413ffb9af3d7d7bbe55e /src/amd/vulkan/radv_meta.h
parent286fe1db473f6341623520cdd75d361c38428c55 (diff)
radv: handle depth/stencil image copy with layouts better. (v3.1)
If we are doing a general->general transfer with HIZ enabled, we want to hit the tile surface disable bits in radv_emit_fb_ds_state, however we never get the current layout to know we are in general and meta hardcoded the transfer layout which is always tile enabled. This fixes: dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general v2: refactor some shared helpers for blit patches v3: we only need multiple render passes as they should be compatible. v3.1: use enum (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.2 17.3" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_meta.h')
-rw-r--r--src/amd/vulkan/radv_meta.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_meta.h b/src/amd/vulkan/radv_meta.h
index d10ec994137..3edf5fa6461 100644
--- a/src/amd/vulkan/radv_meta.h
+++ b/src/amd/vulkan/radv_meta.h
@@ -109,6 +109,7 @@ struct radv_meta_blit2d_surf {
unsigned level;
unsigned layer;
VkImageAspectFlags aspect_mask;
+ VkImageLayout current_layout;
};
struct radv_meta_blit2d_buffer {