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authorSamuel Pitoiset <[email protected]>2019-08-01 10:43:44 +0200
committerSamuel Pitoiset <[email protected]>2019-08-02 09:37:38 +0200
commit96a54455592646f34a2c80656bd75aef1cb00305 (patch)
tree8c9580febbbf0436583f432db05e18783dd9da34 /src/amd/vulkan/radv_llvm_helper.cpp
parent8a86908e9a79fb7ac94df1fa3194b54059a6045f (diff)
radv/gfx10: use the correct target machine for Wave32
Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_llvm_helper.cpp')
-rw-r--r--src/amd/vulkan/radv_llvm_helper.cpp30
1 files changed, 22 insertions, 8 deletions
diff --git a/src/amd/vulkan/radv_llvm_helper.cpp b/src/amd/vulkan/radv_llvm_helper.cpp
index 2b14ddcf184..612548e4219 100644
--- a/src/amd/vulkan/radv_llvm_helper.cpp
+++ b/src/amd/vulkan/radv_llvm_helper.cpp
@@ -28,8 +28,10 @@
class radv_llvm_per_thread_info {
public:
radv_llvm_per_thread_info(enum radeon_family arg_family,
- enum ac_target_machine_options arg_tm_options)
- : family(arg_family), tm_options(arg_tm_options), passes(NULL) {}
+ enum ac_target_machine_options arg_tm_options,
+ unsigned arg_wave_size)
+ : family(arg_family), tm_options(arg_tm_options),
+ wave_size(arg_wave_size), passes(NULL), passes_wave32(NULL) {}
~radv_llvm_per_thread_info()
{
@@ -47,19 +49,28 @@ public:
if (!passes)
return false;
+ if (llvm_info.tm_wave32) {
+ passes_wave32 = ac_create_llvm_passes(llvm_info.tm_wave32);
+ if (!passes_wave32)
+ return false;
+ }
+
return true;
}
bool compile_to_memory_buffer(LLVMModuleRef module,
char **pelf_buffer, size_t *pelf_size)
{
- return ac_compile_module_to_elf(passes, module, pelf_buffer, pelf_size);
+ struct ac_compiler_passes *p = wave_size == 32 ? passes_wave32 : passes;
+ return ac_compile_module_to_elf(p, module, pelf_buffer, pelf_size);
}
bool is_same(enum radeon_family arg_family,
- enum ac_target_machine_options arg_tm_options) {
+ enum ac_target_machine_options arg_tm_options,
+ unsigned arg_wave_size) {
if (arg_family == family &&
- arg_tm_options == tm_options)
+ arg_tm_options == tm_options &&
+ arg_wave_size == wave_size)
return true;
return false;
}
@@ -67,7 +78,9 @@ public:
private:
enum radeon_family family;
enum ac_target_machine_options tm_options;
+ unsigned wave_size;
struct ac_compiler_passes *passes;
+ struct ac_compiler_passes *passes_wave32;
};
/* we have to store a linked list per thread due to the possiblity of multiple gpus being required */
@@ -99,17 +112,18 @@ bool radv_compile_to_elf(struct ac_llvm_compiler *info,
bool radv_init_llvm_compiler(struct ac_llvm_compiler *info,
bool thread_compiler,
enum radeon_family family,
- enum ac_target_machine_options tm_options)
+ enum ac_target_machine_options tm_options,
+ unsigned wave_size)
{
if (thread_compiler) {
for (auto &I : radv_llvm_per_thread_list) {
- if (I.is_same(family, tm_options)) {
+ if (I.is_same(family, tm_options, wave_size)) {
*info = I.llvm_info;
return true;
}
}
- radv_llvm_per_thread_list.emplace_back(family, tm_options);
+ radv_llvm_per_thread_list.emplace_back(family, tm_options, wave_size);
radv_llvm_per_thread_info &tinfo = radv_llvm_per_thread_list.back();
if (!tinfo.init()) {