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authorDave Airlie <[email protected]>2017-08-21 14:04:02 +1000
committerDave Airlie <[email protected]>2017-08-24 01:14:15 +0100
commitbae7723e132d3177697606c799eabbb7cdde2f38 (patch)
treedf09a745ef90758f7c2f4549b55efa5cf5afd359 /src/amd/vulkan/radv_image.c
parenta74d98743115b928eaeabc0d58b63174158aa209 (diff)
radv/gfx9: only minify image view width/height/depth before gfx9.
For gfx9 the addressing for images has changed, so we need to provide the hw with the level0, however we still need to scale for format block differences (so our compressed upload paths still work). Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_image.c')
-rw-r--r--src/amd/vulkan/radv_image.c18
1 files changed, 13 insertions, 5 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index ddf15bc8361..78f52a8f729 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -941,11 +941,19 @@ radv_image_view_init(struct radv_image_view *iview,
iview->vk_format = vk_format_depth_only(iview->vk_format);
}
- iview->extent = (VkExtent3D) {
- .width = radv_minify(image->info.width , range->baseMipLevel),
- .height = radv_minify(image->info.height, range->baseMipLevel),
- .depth = radv_minify(image->info.depth , range->baseMipLevel),
- };
+ if (device->physical_device->rad_info.chip_class >= GFX9) {
+ iview->extent = (VkExtent3D) {
+ .width = image->info.width,
+ .height = image->info.height,
+ .depth = image->info.depth,
+ };
+ } else {
+ iview->extent = (VkExtent3D) {
+ .width = radv_minify(image->info.width , range->baseMipLevel),
+ .height = radv_minify(image->info.height, range->baseMipLevel),
+ .depth = radv_minify(image->info.depth , range->baseMipLevel),
+ };
+ }
if (iview->vk_format != image->vk_format) {
iview->extent.width = round_up_u32(iview->extent.width * vk_format_get_blockwidth(iview->vk_format),