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authorSamuel Pitoiset <[email protected]>2018-11-16 13:40:09 +0100
committerSamuel Pitoiset <[email protected]>2018-11-19 14:05:33 +0100
commit483a28bfd48733d266858b010e3901520a347d59 (patch)
tree3a705bec8923c557e8faa138c0100e14c47296cc /src/amd/vulkan/radv_image.c
parent46a59ce0262a44d6520787741085a716c99200ed (diff)
radv: tidy up radv_set_dcc_need_cmask_elim_pred()
This is just a small cleanup. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_image.c')
-rw-r--r--src/amd/vulkan/radv_image.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 64346aa340f..7492bf48b51 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -857,7 +857,7 @@ radv_image_alloc_dcc(struct radv_image *image)
image->dcc_offset = align64(image->size, image->surface.dcc_alignment);
/* + 16 for storing the clear values + dcc pred */
image->clear_value_offset = image->dcc_offset + image->surface.dcc_size;
- image->dcc_pred_offset = image->clear_value_offset + 8;
+ image->fce_pred_offset = image->clear_value_offset + 8;
image->size = image->dcc_offset + image->surface.dcc_size + 16;
image->alignment = MAX2(image->alignment, image->surface.dcc_alignment);
}