diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2017-12-28 02:54:10 +0100 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2017-12-29 12:21:53 +0100 |
| commit | 44fcf5874454dc5b68596c4eceeb9067bbe6527f (patch) | |
| tree | 880d65dbd65ff0915a26fc9d4155c05d4a769964 /src/amd/vulkan/radv_image.c | |
| parent | 95f50f7f6cd0e2b2708b501c051e8980b8ec3008 (diff) | |
radv: Disable DCC for GENERAL layout and compute transfer dest.
Apps can use this for render feedback loops, where things are
defined if they render each pixel only once. However, DCC fails
here, as the level of coherence is a block not a pixel, so disable it.
This is also going to help implementing other stuff.
Even if we optimize this later to only happen if there actually is
a loop (if possible at all ...), then the machinery is still useful
to exclude images accessible by the SDMA queue when that is implemented.
Reviewed-by: Dave Airlie <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_image.c')
| -rw-r--r-- | src/amd/vulkan/radv_image.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index d57df536d15..d5085861ddf 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -1113,6 +1113,18 @@ bool radv_layout_can_fast_clear(const struct radv_image *image, queue_mask == (1u << RADV_QUEUE_GENERAL); } +bool radv_layout_dcc_compressed(const struct radv_image *image, + VkImageLayout layout, + unsigned queue_mask) +{ + /* Don't compress compute transfer dst, as image stores are not supported. */ + if (layout == VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL && + (queue_mask & (1u << RADV_QUEUE_COMPUTE))) + return false; + + return image->surface.num_dcc_levels > 0 && layout != VK_IMAGE_LAYOUT_GENERAL; +} + unsigned radv_image_queue_family_mask(const struct radv_image *image, uint32_t family, uint32_t queue_family) { |