diff options
| author | Samuel Pitoiset <[email protected]> | 2019-07-11 11:54:24 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-07-11 13:43:21 +0200 |
| commit | f3dfdd4091dbe821f23fef7141d091f7ffc6e292 (patch) | |
| tree | e0a3c45584b54df6aaa7677a40866aafaa0bd4fd /src/amd/vulkan/radv_image.c | |
| parent | a01770b9c878b6b95875ef60146ce4ee5e4cfd54 (diff) | |
radv/gfx10: disable TC-compat HTILE for multisampled D32_SFLOAT format
For some reasons D32_SFLOAT is also affected on GFX10, it works
fine with previous generations.
This fixes some dEQP-VK.renderpass2.depth_stencil_resolve.*.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_image.c')
| -rw-r--r-- | src/amd/vulkan/radv_image.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 6245873a4ed..368bd5d839d 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -83,9 +83,12 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device, return false; /* FIXME: for some reason TC compat with 2/4/8 samples breaks some cts - * tests - disable for now */ + * tests - disable for now. On GFX10 D32_SFLOAT is affected as well. + */ if (pCreateInfo->samples >= 2 && - pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT) + (pCreateInfo->format == VK_FORMAT_D32_SFLOAT_S8_UINT || + (pCreateInfo->format == VK_FORMAT_D32_SFLOAT && + device->physical_device->rad_info.chip_class == GFX10))) return false; /* GFX9 supports both 32-bit and 16-bit depth surfaces, while GFX8 only |