diff options
| author | Dave Airlie <[email protected]> | 2017-06-06 09:01:48 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-06-06 09:43:40 +1000 |
| commit | c2fbeb7ca057b3bee8c8cd0f7076af2b90d28111 (patch) | |
| tree | 4e8263e1a9be4ba109e76008bdafe642778db081 /src/amd/vulkan/radv_device.c | |
| parent | b11c4a554681607bbec67f45442b815b51573236 (diff) | |
radv: add GFX9 cache flushing support.
GFX9 needs to write event EOP to a fence buffer, allocate some
space for this, and just write an ever increasing number to it,
this isn't exactly what radeonsi does, but it seems to work.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_device.c')
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index ca42ab8e0e1..9d510ea59ea 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1103,6 +1103,7 @@ VkResult radv_CreateDevice( case RADV_QUEUE_COMPUTE: si_cs_emit_cache_flush(device->flush_cs[family], device->physical_device->rad_info.chip_class, + NULL, 0, family == RADV_QUEUE_COMPUTE && device->physical_device->rad_info.chip_class >= CIK, RADV_CMD_FLAG_INV_ICACHE | RADV_CMD_FLAG_INV_SMEM_L1 | @@ -1118,6 +1119,7 @@ VkResult radv_CreateDevice( case RADV_QUEUE_COMPUTE: si_cs_emit_cache_flush(device->flush_shader_cs[family], device->physical_device->rad_info.chip_class, + NULL, 0, family == RADV_QUEUE_COMPUTE && device->physical_device->rad_info.chip_class >= CIK, family == RADV_QUEUE_COMPUTE ? RADV_CMD_FLAG_CS_PARTIAL_FLUSH : (RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_PS_PARTIAL_FLUSH) | RADV_CMD_FLAG_INV_ICACHE | @@ -1763,6 +1765,7 @@ radv_get_preamble_cs(struct radv_queue *queue, if (!i) { si_cs_emit_cache_flush(cs, queue->device->physical_device->rad_info.chip_class, + NULL, 0, queue->queue_family_index == RING_COMPUTE && queue->device->physical_device->rad_info.chip_class >= CIK, RADV_CMD_FLAG_INV_ICACHE | |