diff options
| author | Andres Rodriguez <[email protected]> | 2017-10-20 18:42:13 -0400 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2017-10-21 01:15:54 +0200 |
| commit | a2c6fbb3ee16a58a9098b031a6382618d570bee8 (patch) | |
| tree | 03bd156ec4504db1eac4eefeb79e20910a16613e /src/amd/vulkan/radv_device.c | |
| parent | eff2bdbd8272ceec723dcc1643dd3d5f77020d1f (diff) | |
radv: disable implicit sync for radv allocated bos v3
Implicit sync kicks in when a buffer is used by two different amdgpu
contexts simultaneously. Jobs that use explicit synchronization
mechanisms end up needlessly waiting to be scheduled for long periods
of time in order to achieve serialized execution.
This patch disables implicit synchronization for all radv allocations
except for wsi bos. The only systems that require implicit
synchronization are DRI2/3 and PRIME.
v2: mark wsi bos as RADV_MEM_IMPLICIT_SYNC
v3: Add drm version check (Bas)
Signed-off-by: Andres Rodriguez <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_device.c')
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 5e6e9dcdb58..c4e25222eaf 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -2115,6 +2115,9 @@ VkResult radv_alloc_memory(VkDevice _device, if (pAllocateInfo->memoryTypeIndex == RADV_MEM_TYPE_GTT_WRITE_COMBINE) flags |= RADEON_FLAG_GTT_WC; + if (mem_flags & RADV_MEM_IMPLICIT_SYNC) + flags |= RADEON_FLAG_IMPLICIT_SYNC; + mem->bo = device->ws->buffer_create(device->ws, alloc_size, device->physical_device->rad_info.max_alignment, domain, flags); |