diff options
| author | Samuel Pitoiset <[email protected]> | 2018-04-17 16:05:18 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2018-04-19 09:10:55 +0200 |
| commit | 2f63b3dd09cb516b83537504adf36a0227e3f874 (patch) | |
| tree | 1e346f0526d563c1991a27beac18e9332329d58b /src/amd/vulkan/radv_device.c | |
| parent | dc3d39771ff561fe3e71aa0d08623e190ff496f9 (diff) | |
radv: enable DCC for MSAA 2x textures on VI under an option
This can be enabled with RADV_PERFTEST=dccmsaa.
DCC for MSAA textures is actually not as easy to implement. It
looks like there is some corner cases. I will improve support
incrementally.
Vega support, as well as Polaris improvements, will be added later.
No CTS changes on Polaris using RADV_DEBUG=zerovram and
RADV_PERFTEST=dccmsaa.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_device.c')
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index fd11cedcbfe..14ecbd02001 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -314,6 +314,9 @@ radv_physical_device_init(struct radv_physical_device *device, device->out_of_order_rast_allowed = device->has_out_of_order_rast && (device->instance->perftest_flags & RADV_PERFTEST_OUT_OF_ORDER); + device->dcc_msaa_allowed = device->rad_info.chip_class == VI && + (device->instance->perftest_flags & RADV_PERFTEST_DCC_MSAA); + radv_physical_device_init_mem_types(device); radv_fill_device_extension_table(device, &device->supported_extensions); @@ -399,6 +402,7 @@ static const struct debug_control radv_perftest_options[] = { {"localbos", RADV_PERFTEST_LOCAL_BOS}, {"binning", RADV_PERFTEST_BINNING}, {"outoforderrast", RADV_PERFTEST_OUT_OF_ORDER}, + {"dccmsaa", RADV_PERFTEST_DCC_MSAA}, {NULL, 0} }; |