diff options
| author | Samuel Pitoiset <[email protected]> | 2019-06-25 11:32:53 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2019-07-07 17:03:38 +0200 |
| commit | 3f5ca22e9c13815eeef36877069febc65c13c3f4 (patch) | |
| tree | deaebde57e0c4b5d1cc7cb650735f9f9df22f5c5 /src/amd/vulkan/radv_device.c | |
| parent | 17048c17657734880fac30038c79487e79ba2cf9 (diff) | |
radv/gfx10: implement radv_emit_tess_factor_ring()
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_device.c')
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 8810e995f10..5248814c92b 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -2386,7 +2386,11 @@ radv_emit_tess_factor_ring(struct radv_queue *queue, struct radeon_cmdbuf *cs, S_030938_SIZE(tf_ring_size / 4)); radeon_set_uconfig_reg(cs, R_030940_VGT_TF_MEMORY_BASE, tf_va >> 8); - if (queue->device->physical_device->rad_info.chip_class >= GFX9) { + + if (queue->device->physical_device->rad_info.chip_class >= GFX10) { + radeon_set_uconfig_reg(cs, R_030984_VGT_TF_MEMORY_BASE_HI_UMD, + S_030984_BASE_HI(tf_va >> 40)); + } else if (queue->device->physical_device->rad_info.chip_class == GFX9) { radeon_set_uconfig_reg(cs, R_030944_VGT_TF_MEMORY_BASE_HI, S_030944_BASE_HI(tf_va >> 40)); } |