diff options
| author | Samuel Pitoiset <[email protected]> | 2018-04-17 16:05:18 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2018-04-19 09:10:55 +0200 |
| commit | 2f63b3dd09cb516b83537504adf36a0227e3f874 (patch) | |
| tree | 1e346f0526d563c1991a27beac18e9332329d58b /src/amd/vulkan/radv_debug.h | |
| parent | dc3d39771ff561fe3e71aa0d08623e190ff496f9 (diff) | |
radv: enable DCC for MSAA 2x textures on VI under an option
This can be enabled with RADV_PERFTEST=dccmsaa.
DCC for MSAA textures is actually not as easy to implement. It
looks like there is some corner cases. I will improve support
incrementally.
Vega support, as well as Polaris improvements, will be added later.
No CTS changes on Polaris using RADV_DEBUG=zerovram and
RADV_PERFTEST=dccmsaa.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_debug.h')
| -rw-r--r-- | src/amd/vulkan/radv_debug.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_debug.h b/src/amd/vulkan/radv_debug.h index f35991fa4e5..79c624aec1d 100644 --- a/src/amd/vulkan/radv_debug.h +++ b/src/amd/vulkan/radv_debug.h @@ -51,6 +51,7 @@ enum { RADV_PERFTEST_LOCAL_BOS = 0x4, RADV_PERFTEST_BINNING = 0x8, RADV_PERFTEST_OUT_OF_ORDER = 0x10, + RADV_PERFTEST_DCC_MSAA = 0x20, }; bool |