diff options
author | Samuel Pitoiset <[email protected]> | 2017-11-08 12:12:30 +0100 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2017-11-13 11:03:13 +0100 |
commit | 9444a34f4a3b7d954f4a009861a677aca1eaf4af (patch) | |
tree | c598c75f268fab606c0998610ee09321d54510c6 /src/amd/vulkan/radv_cmd_buffer.c | |
parent | 36c2e46328287b9ad0211e11117f5e65198d8d2f (diff) |
radv: add radv_emit_prefetch_TC_L2_async() helper
Will be used for VBO descriptors prefetching.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_cmd_buffer.c')
-rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 3bf2d4a8b93..1d552e265ae 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -660,6 +660,14 @@ radv_emit_graphics_raster_state(struct radv_cmd_buffer *cmd_buffer, raster->pa_su_sc_mode_cntl); } +static inline void +radv_emit_prefetch_TC_L2_async(struct radv_cmd_buffer *cmd_buffer, uint64_t va, + unsigned size) +{ + if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) + si_cp_dma_prefetch(cmd_buffer, va, size); +} + static void radv_emit_shader_prefetch(struct radv_cmd_buffer *cmd_buffer, struct radv_shader_variant *shader) @@ -674,8 +682,7 @@ radv_emit_shader_prefetch(struct radv_cmd_buffer *cmd_buffer, va = radv_buffer_get_va(shader->bo) + shader->bo_offset; radv_cs_add_buffer(ws, cs, shader->bo, 8); - if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) - si_cp_dma_prefetch(cmd_buffer, va, shader->code_size); + radv_emit_prefetch_TC_L2_async(cmd_buffer, va, shader->code_size); } static void |