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authorSamuel Pitoiset <[email protected]>2017-10-13 18:01:56 +0200
committerSamuel Pitoiset <[email protected]>2017-10-14 12:05:19 +0200
commita4c08c8cd5257fd628ab829bec0a119076c8f641 (patch)
tree049157972df037ddac3bfb1ece9360e55d394ecd /src/amd/vulkan/radv_cmd_buffer.c
parent3e5f27faf3b0702c66f932b3e6ba6301c371e2d1 (diff)
radv: set correct INDEX_TYPE for indexed indirect draws on GFX9
Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_cmd_buffer.c')
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 47495160aef..39dfffc3762 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -3058,8 +3058,14 @@ radv_cmd_draw_indexed_indirect_count(
MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 31 * MAX_VIEWS);
- radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_TYPE, 0, 0));
- radeon_emit(cmd_buffer->cs, cmd_buffer->state.index_type);
+ if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
+ radeon_set_uconfig_reg_idx(cmd_buffer->cs,
+ R_03090C_VGT_INDEX_TYPE,
+ 2, cmd_buffer->state.index_type);
+ } else {
+ radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_TYPE, 0, 0));
+ radeon_emit(cmd_buffer->cs, cmd_buffer->state.index_type);
+ }
radeon_emit(cmd_buffer->cs, PKT3(PKT3_INDEX_BASE, 1, 0));
radeon_emit(cmd_buffer->cs, index_va);