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authorSamuel Pitoiset <[email protected]>2018-09-12 15:40:07 +0200
committerSamuel Pitoiset <[email protected]>2018-09-14 10:59:52 +0200
commit063264db5be2941746fa58f164cdc803362753a9 (patch)
tree1298217f8e7101068d466c50238cbd7d1edcb0e3 /src/amd/vulkan/radv_cmd_buffer.c
parentaa3020592964344c7032396d159e4ab2df743587 (diff)
radv: fix GPU hangs with 32-bit indirect descriptors
LLVM 6 isn't affected. Fixes GPU hangs with new CTS: dEQP-VK.binding_model.descriptorset_random.* CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_cmd_buffer.c')
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 5b2a45f5cee..fd71e9a7af0 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1657,7 +1657,8 @@ radv_flush_indirect_descriptor_sets(struct radv_cmd_buffer *cmd_buffer,
{
struct radv_descriptor_state *descriptors_state =
radv_get_descriptors_state(cmd_buffer, bind_point);
- uint32_t size = MAX_SETS * 2 * 4;
+ uint8_t ptr_size = HAVE_32BIT_POINTERS ? 1 : 2;
+ uint32_t size = MAX_SETS * 4 * ptr_size;
uint32_t offset;
void *ptr;
@@ -1666,13 +1667,14 @@ radv_flush_indirect_descriptor_sets(struct radv_cmd_buffer *cmd_buffer,
return;
for (unsigned i = 0; i < MAX_SETS; i++) {
- uint32_t *uptr = ((uint32_t *)ptr) + i * 2;
+ uint32_t *uptr = ((uint32_t *)ptr) + i * ptr_size;
uint64_t set_va = 0;
struct radv_descriptor_set *set = descriptors_state->sets[i];
if (descriptors_state->valid & (1u << i))
set_va = set->va;
uptr[0] = set_va & 0xffffffff;
- uptr[1] = set_va >> 32;
+ if (ptr_size == 2)
+ uptr[1] = set_va >> 32;
}
uint64_t va = radv_buffer_get_va(cmd_buffer->upload.upload_bo);