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authorBas Nieuwenhuizen <[email protected]>2017-03-08 23:51:01 +0100
committerBas Nieuwenhuizen <[email protected]>2017-03-09 02:35:19 +0100
commit9251f8b35ef081db65cb8c2018d7f8f4bc3c1be3 (patch)
tree138cc75ebf0944d97fafdecd2a812b9ad4969326 /src/amd/vulkan/radv_cmd_buffer.c
parentf92a118434452df201cda6d9ec2405aca669b104 (diff)
radv: Only flush for the needed stages, and before the flushes.
Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_cmd_buffer.c')
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 5d4236ca187..274495f134f 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2928,6 +2928,7 @@ void radv_CmdPipelineBarrier(
image);
}
+ radv_stage_flush(cmd_buffer, srcStageMask);
cmd_buffer->state.flush_bits |= src_flush_bits;
for (uint32_t i = 0; i < imageMemoryBarrierCount; i++) {
@@ -2942,12 +2943,6 @@ void radv_CmdPipelineBarrier(
}
cmd_buffer->state.flush_bits |= dst_flush_bits;
-
- /* TODO reduce this */
- enum radv_cmd_flush_bits flush_bits = RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
- RADV_CMD_FLAG_PS_PARTIAL_FLUSH;
-
- cmd_buffer->state.flush_bits |= flush_bits;
}