diff options
author | Samuel Pitoiset <[email protected]> | 2020-01-29 14:38:55 +0100 |
---|---|---|
committer | Marge Bot <[email protected]> | 2020-04-03 08:01:28 +0000 |
commit | c6bf1597d1e8abf122371118b04a85ee0aa6b3d5 (patch) | |
tree | e9a38ad122f4c6141f7a83f472bb51c01b26f29a /src/amd/llvm | |
parent | 433f3380eb2ba97363ec8f47bc7d29904a4d355e (diff) |
ac/nir: split 8-bit SSBO stores on GFX6
Due to possible alignment issues, make sure to split stores of
8-bit vectors.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
Diffstat (limited to 'src/amd/llvm')
-rw-r--r-- | src/amd/llvm/ac_nir_to_llvm.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index be1c599fbb1..84067667ef4 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -1740,6 +1740,15 @@ static void visit_store_ssbo(struct ac_nir_context *ctx, count = 1; num_bytes = 2; } + + /* Due to alignment issues, split stores of 8-bit vectors. */ + if (ctx->ac.chip_class == GFX6 && + elem_size_bytes == 1 && count > 1) { + writemask |= ((1u << (count - 1)) - 1u) << (start + 1); + count = 1; + num_bytes = 1; + } + data = extract_vector_range(&ctx->ac, base_data, start, count); offset = LLVMBuildAdd(ctx->ac.builder, base_offset, |