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authorRhys Perry <[email protected]>2019-12-16 13:58:16 +0000
committerRhys Perry <[email protected]>2020-01-13 13:26:43 +0000
commitef8abfa7908974f571786e83b047b187af0e48c7 (patch)
tree624018064d53c3a2c1b0822d0c716ab5ab34a6a5 /src/amd/compiler
parent69bed1c9186c3e24ad54089218d58c5f7b83befe (diff)
aco: disable add combining for ds_swizzle_b32
ds_bpermute_b32/ds_permute_b32 are fine, I think Signed-off-by: Rhys Perry <[email protected]> Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler') Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
Diffstat (limited to 'src/amd/compiler')
-rw-r--r--src/amd/compiler/aco_optimizer.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/compiler/aco_optimizer.cpp b/src/amd/compiler/aco_optimizer.cpp
index e224d1a3a5f..48a56a57f35 100644
--- a/src/amd/compiler/aco_optimizer.cpp
+++ b/src/amd/compiler/aco_optimizer.cpp
@@ -701,7 +701,7 @@ void label_instruction(opt_ctx &ctx, Block& block, aco_ptr<Instruction>& instr)
DS_instruction *ds = static_cast<DS_instruction *>(instr.get());
Temp base;
uint32_t offset;
- if (i == 0 && parse_base_offset(ctx, instr.get(), i, &base, &offset) && base.regClass() == instr->operands[i].regClass()) {
+ if (i == 0 && parse_base_offset(ctx, instr.get(), i, &base, &offset) && base.regClass() == instr->operands[i].regClass() && instr->opcode != aco_opcode::ds_swizzle_b32) {
if (instr->opcode == aco_opcode::ds_write2_b32 || instr->opcode == aco_opcode::ds_read2_b32 ||
instr->opcode == aco_opcode::ds_write2_b64 || instr->opcode == aco_opcode::ds_read2_b64) {
if (offset % 4 == 0 &&