diff options
| author | Rhys Perry <[email protected]> | 2019-09-25 12:16:34 +0100 |
|---|---|---|
| committer | Rhys Perry <[email protected]> | 2019-09-25 15:27:48 +0000 |
| commit | b125dc4839be82c51229ec825a22e00de1089191 (patch) | |
| tree | 786030a17621b0940c5ab81e257c4d7ebee01b4d /src/amd/compiler | |
| parent | 641eac953c5fd59f69d3e7abe1443febc38d3a37 (diff) | |
aco: implement 64-bit ineg
We currently lower them, but nir_opt_algebraic() can add new ones because
lower_sub=true.
Signed-off-by: Rhys Perry <[email protected]>
Reviewed-by: Daniel Schürmann <[email protected]>
Diffstat (limited to 'src/amd/compiler')
| -rw-r--r-- | src/amd/compiler/aco_instruction_selection.cpp | 16 | ||||
| -rw-r--r-- | src/amd/compiler/aco_instruction_selection_setup.cpp | 3 |
2 files changed, 17 insertions, 2 deletions
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index d52043f3c0d..7405b1142f9 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -689,6 +689,22 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr) bld.vsub32(Definition(dst), Operand(0u), Operand(src)); } else if (dst.regClass() == s1) { bld.sop2(aco_opcode::s_mul_i32, Definition(dst), Operand((uint32_t) -1), src); + } else if (dst.size() == 2) { + Temp src0 = bld.tmp(dst.type(), 1); + Temp src1 = bld.tmp(dst.type(), 1); + bld.pseudo(aco_opcode::p_split_vector, Definition(src0), Definition(src1), src); + + if (dst.regClass() == s2) { + Temp carry = bld.tmp(s1); + Temp dst0 = bld.sop2(aco_opcode::s_sub_u32, bld.def(s1), bld.scc(Definition(carry)), Operand(0u), src0); + Temp dst1 = bld.sop2(aco_opcode::s_subb_u32, bld.def(s1), bld.def(s1, scc), Operand(0u), src1, carry); + bld.pseudo(aco_opcode::p_create_vector, Definition(dst), dst0, dst1); + } else { + Temp lower = bld.tmp(v1); + Temp borrow = bld.vsub32(Definition(lower), Operand(0u), src0, true).def(1).getTemp(); + Temp upper = bld.vsub32(bld.def(v1), Operand(0u), src1, false, borrow); + bld.pseudo(aco_opcode::p_create_vector, Definition(dst), lower, upper); + } } else { fprintf(stderr, "Unimplemented NIR instr bit size: "); nir_print_instr(&instr->instr, stderr); diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index f77d12d2364..3a276035ba5 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -1314,8 +1314,7 @@ setup_isel_context(Program* program, nir_lower_divmod64 | nir_lower_logic64 | nir_lower_minmax64 | - nir_lower_iabs64 | - nir_lower_ineg64)); + nir_lower_iabs64)); nir_opt_idiv_const(nir, 32); nir_lower_idiv(nir); // TODO: use the LLVM path once !1239 is merged |