diff options
| author | Rhys Perry <[email protected]> | 2020-04-27 20:51:56 +0100 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-04-28 23:16:55 +0000 |
| commit | cca8d6ce061d5d45af5eabf631a8eaed366fd4c5 (patch) | |
| tree | b539b511f836fd531029eaf9176375d2d7932433 /src/amd/compiler/aco_validate.cpp | |
| parent | 307aca83a278938ec4a4932b7fa7dc6c8e189e60 (diff) | |
aco: fix sub-dword out-of-bounds check in RA validator
Signed-off-by: Rhys Perry <[email protected]>
Reviewed-by: Daniel Schürmann <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
Diffstat (limited to 'src/amd/compiler/aco_validate.cpp')
| -rw-r--r-- | src/amd/compiler/aco_validate.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/amd/compiler/aco_validate.cpp b/src/amd/compiler/aco_validate.cpp index 2f51b8a2eb1..187155beded 100644 --- a/src/amd/compiler/aco_validate.cpp +++ b/src/amd/compiler/aco_validate.cpp @@ -456,7 +456,7 @@ bool validate_ra(Program *program, const struct radv_nir_compiler_options *optio err |= ra_fail(output, loc, Location(), "Operand %d is not assigned a register", i); if (assignments.count(op.tempId()) && assignments[op.tempId()].reg != op.physReg()) err |= ra_fail(output, loc, assignments.at(op.tempId()).firstloc, "Operand %d has an inconsistent register assignment with instruction", i); - if ((op.getTemp().type() == RegType::vgpr && op.physReg() + op.size() > 256 + program->config->num_vgprs) || + if ((op.getTemp().type() == RegType::vgpr && op.physReg().reg_b + op.bytes() > (256 + program->config->num_vgprs) * 4) || (op.getTemp().type() == RegType::sgpr && op.physReg() + op.size() > program->config->num_sgprs && op.physReg() < program->sgpr_limit)) err |= ra_fail(output, loc, assignments.at(op.tempId()).firstloc, "Operand %d has an out-of-bounds register assignment", i); if (op.physReg() == vcc && !program->needs_vcc) @@ -477,7 +477,7 @@ bool validate_ra(Program *program, const struct radv_nir_compiler_options *optio err |= ra_fail(output, loc, Location(), "Definition %d is not assigned a register", i); if (assignments[def.tempId()].defloc.block) err |= ra_fail(output, loc, assignments.at(def.tempId()).defloc, "Temporary %%%d also defined by instruction", def.tempId()); - if ((def.getTemp().type() == RegType::vgpr && def.physReg() + def.size() > 256 + program->config->num_vgprs) || + if ((def.getTemp().type() == RegType::vgpr && def.physReg().reg_b + def.bytes() > (256 + program->config->num_vgprs) * 4) || (def.getTemp().type() == RegType::sgpr && def.physReg() + def.size() > program->config->num_sgprs && def.physReg() < program->sgpr_limit)) err |= ra_fail(output, loc, assignments.at(def.tempId()).firstloc, "Definition %d has an out-of-bounds register assignment", i); if (def.physReg() == vcc && !program->needs_vcc) |