aco: allow reading/writing upper halves/bytes when possible

Use SDWA, opsel or a different opcode to achieve this.

shader-db (Navi, fp16 enabled):
Totals from 42 (0.03% of 127638) affected shaders:
VGPRs: 3424 -> 3416 (-0.23%)
CodeSize: 811124 -> 811984 (+0.11%); split: -0.12%, +0.23%
Instrs: 156638 -> 155733 (-0.58%)
Cycles: 1994180 -> 1982568 (-0.58%); split: -0.59%, +0.00%
VMEM: 7019 -> 7187 (+2.39%); split: +3.45%, -1.05%
SMEM: 1771 -> 1770 (-0.06%); split: +0.06%, -0.11%
VClause: 1477 -> 1475 (-0.14%)
Copies: 13216 -> 12406 (-6.13%)
Branches: 5942 -> 5901 (-0.69%)

Signed-off-by: Rhys Perry <[email protected]>
Reviewed-by: Daniel Schürmann <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>

1 files changed, 121 insertions, 0 deletions

diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp
index f9ee3d78bfa..6272d8d6123 100644
--- a/src/amd/compiler/aco_ir.cpp
+++ b/src/amd/compiler/aco_ir.cpp
@@ -25,6 +25,127 @@
 
 namespace aco {
 
+bool can_use_SDWA(chip_class chip, const aco_ptr<Instruction>& instr)
+{
+   if (!instr->isVALU())
+      return false;
+
+   if (chip < GFX8 || instr->isDPP())
+      return false;
+
+   if (instr->isSDWA())
+      return true;
+
+   if (instr->isVOP3()) {
+      VOP3A_instruction *vop3 = static_cast<VOP3A_instruction*>(instr.get());
+      if (instr->format == Format::VOP3)
+         return false;
+      if (vop3->clamp && instr->format == asVOP3(Format::VOPC) && chip != GFX8)
+         return false;
+      if (vop3->omod && chip < GFX9)
+         return false;
+
+      //TODO: return true if we know we will use vcc
+      if (instr->definitions.size() >= 2)
+         return false;
+
+      for (unsigned i = 1; i < instr->operands.size(); i++) {
+         if (instr->operands[i].isLiteral())
+            return false;
+         if (chip < GFX9 && !instr->operands[i].isOfType(RegType::vgpr))
+            return false;
+      }
+   }
+
+   if (!instr->operands.empty()) {
+      if (instr->operands[0].isLiteral())
+         return false;
+      if (chip < GFX9 && !instr->operands[0].isOfType(RegType::vgpr))
+         return false;
+   }
+
+   bool is_mac = instr->opcode == aco_opcode::v_mac_f32 ||
+                 instr->opcode == aco_opcode::v_mac_f16 ||
+                 instr->opcode == aco_opcode::v_fmac_f32 ||
+                 instr->opcode == aco_opcode::v_fmac_f16;
+
+   if (chip != GFX8 && is_mac)
+      return false;
+
+   //TODO: return true if we know we will use vcc
+   if ((unsigned)instr->format & (unsigned)Format::VOPC)
+      return false;
+   if (instr->operands.size() >= 3 && !is_mac)
+      return false;
+
+   return instr->opcode != aco_opcode::v_madmk_f32 &&
+          instr->opcode != aco_opcode::v_madak_f32 &&
+          instr->opcode != aco_opcode::v_madmk_f16 &&
+          instr->opcode != aco_opcode::v_madak_f16 &&
+          instr->opcode != aco_opcode::v_readfirstlane_b32 &&
+          instr->opcode != aco_opcode::v_clrexcp &&
+          instr->opcode != aco_opcode::v_swap_b32;
+}
+
+/* updates "instr" and returns the old instruction (or NULL if no update was needed) */
+aco_ptr<Instruction> convert_to_SDWA(chip_class chip, aco_ptr<Instruction>& instr)
+{
+   if (instr->isSDWA())
+      return NULL;
+
+   aco_ptr<Instruction> tmp = std::move(instr);
+   Format format = (Format)(((uint16_t)tmp->format & ~(uint16_t)Format::VOP3) | (uint16_t)Format::SDWA);
+   instr.reset(create_instruction<SDWA_instruction>(tmp->opcode, format, tmp->operands.size(), tmp->definitions.size()));
+   std::copy(tmp->operands.cbegin(), tmp->operands.cend(), instr->operands.begin());
+   std::copy(tmp->definitions.cbegin(), tmp->definitions.cend(), instr->definitions.begin());
+
+   SDWA_instruction *sdwa = static_cast<SDWA_instruction*>(instr.get());
+
+   if (tmp->isVOP3()) {
+      VOP3A_instruction *vop3 = static_cast<VOP3A_instruction*>(tmp.get());
+      memcpy(sdwa->neg, vop3->neg, sizeof(sdwa->neg));
+      memcpy(sdwa->abs, vop3->abs, sizeof(sdwa->abs));
+      sdwa->omod = vop3->omod;
+      sdwa->clamp = vop3->clamp;
+   }
+
+   for (unsigned i = 0; i < instr->operands.size(); i++) {
+      switch (instr->operands[i].bytes()) {
+      case 1:
+         sdwa->sel[i] = sdwa_ubyte;
+         break;
+      case 2:
+         sdwa->sel[i] = sdwa_uword;
+         break;
+      case 4:
+         sdwa->sel[i] = sdwa_udword;
+         break;
+      }
+   }
+   switch (instr->definitions[0].bytes()) {
+   case 1:
+      sdwa->dst_sel = sdwa_ubyte;
+      sdwa->dst_preserve = true;
+      break;
+   case 2:
+      sdwa->dst_sel = sdwa_uword;
+      sdwa->dst_preserve = true;
+      break;
+   case 4:
+      sdwa->dst_sel = sdwa_udword;
+      break;
+   }
+
+   if (instr->definitions[0].getTemp().type() == RegType::sgpr && chip == GFX8)
+      instr->definitions[0].setFixed(vcc);
+   if (instr->definitions.size() >= 2)
+      instr->definitions[1].setFixed(vcc);
+   if (instr->operands.size() >= 3)
+      instr->operands[2].setFixed(vcc);
+
+   return tmp;
+}
+
 bool can_use_opsel(chip_class chip, aco_opcode op, int idx, bool high)
 {
    /* opsel is only GFX9+ */