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authorDave Airlie <[email protected]>2017-04-21 03:17:23 +0100
committerDave Airlie <[email protected]>2017-04-25 23:24:39 +0100
commitb2cedb3ea9482d3099506069204a2d226ccd54fc (patch)
treea45aea68146b8fee4706d38c67fb44a2bec76afd /src/amd/common
parentb858cb4df8f7be9baa33d7e20347d2fe77822872 (diff)
radv/ac: overhaul vs output/ps input routing
In order to cleanly eliminate exports rewrite the code first to mirror how radeonsi works for now. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/common')
-rw-r--r--src/amd/common/ac_nir_to_llvm.c10
-rw-r--r--src/amd/common/ac_nir_to_llvm.h15
2 files changed, 19 insertions, 6 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 514c9e9ca35..ab929bc81fe 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -5133,8 +5133,9 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
LLVMValueRef psize_value = NULL, layer_value = NULL, viewport_index_value = NULL;
int i;
- outinfo->prim_id_output = 0xffffffff;
- outinfo->layer_output = 0xffffffff;
+ memset(outinfo->vs_output_param_offset, EXP_PARAM_UNDEFINED,
+ sizeof(outinfo->vs_output_param_offset));
+
if (ctx->output_mask & (1ull << VARYING_SLOT_CLIP_DIST0)) {
LLVMValueRef slots[8];
unsigned j;
@@ -5184,20 +5185,21 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
} else if (i == VARYING_SLOT_LAYER) {
outinfo->writes_layer = true;
layer_value = values[0];
- outinfo->layer_output = param_count;
target = V_008DFC_SQ_EXP_PARAM + param_count;
+ outinfo->vs_output_param_offset[VARYING_SLOT_LAYER] = param_count;
param_count++;
} else if (i == VARYING_SLOT_VIEWPORT) {
outinfo->writes_viewport_index = true;
viewport_index_value = values[0];
continue;
} else if (i == VARYING_SLOT_PRIMITIVE_ID) {
- outinfo->prim_id_output = param_count;
target = V_008DFC_SQ_EXP_PARAM + param_count;
+ outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = param_count;
param_count++;
} else if (i >= VARYING_SLOT_VAR0) {
outinfo->export_mask |= 1u << (i - VARYING_SLOT_VAR0);
target = V_008DFC_SQ_EXP_PARAM + param_count;
+ outinfo->vs_output_param_offset[i] = param_count;
param_count++;
}
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 401d284a7c4..f77a9b8d2bb 100644
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -120,14 +120,25 @@ struct ac_userdata_locations {
struct ac_userdata_info shader_data[AC_UD_MAX_UD];
};
+enum {
+ /* SPI_PS_INPUT_CNTL_i.OFFSET[0:4] */
+ EXP_PARAM_OFFSET_0 = 0,
+ EXP_PARAM_OFFSET_31 = 31,
+ /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL[0:1] */
+ EXP_PARAM_DEFAULT_VAL_0000 = 64,
+ EXP_PARAM_DEFAULT_VAL_0001,
+ EXP_PARAM_DEFAULT_VAL_1110,
+ EXP_PARAM_DEFAULT_VAL_1111,
+ EXP_PARAM_UNDEFINED = 255,
+};
+
struct ac_vs_output_info {
+ uint8_t vs_output_param_offset[VARYING_SLOT_MAX];
uint8_t clip_dist_mask;
uint8_t cull_dist_mask;
bool writes_pointsize;
bool writes_layer;
bool writes_viewport_index;
- uint32_t prim_id_output;
- uint32_t layer_output;
uint32_t export_mask;
unsigned param_exports;
unsigned pos_exports;