diff options
| author | Nicolai Hähnle <[email protected]> | 2017-09-23 13:20:25 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2017-09-29 11:44:50 +0200 |
| commit | 4c56e070296be6f53bfc1a3a4c864f12c035d3a4 (patch) | |
| tree | cc064e1191baf150b6ad974734d5b7e53b4c10c0 /src/amd/common | |
| parent | 7dfa891f32316b17ae6f21dceb1b00845d34524a (diff) | |
radeonsi: clamp depth comparison value only for fixed point formats
The hardware usually does this automatically. However, we upgrade
depth to Z32_FLOAT to enable TC-compatible HTILE, which means the
hardware no longer clamps the comparison value for us.
The only way to tell in the shader whether a clamp is required
seems to be to communicate an additional bit in the descriptor
table. While VI has some unused bits in the resource descriptor,
those bits have unfortunately all been used in gfx9. So we use
an unused bit in the sampler state instead.
Fixes dEQP-GLES3.functional.texture.shadow.2d.linear.equal_depth_component32f
and many other tests in dEQP-GLES3.functional.texture.shadow.*
Fixes: d4d9ec55c589 ("radeonsi: implement TC-compatible HTILE")
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/sid.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h index a8c78c1b2bf..1016f674707 100644 --- a/src/amd/common/sid.h +++ b/src/amd/common/sid.h @@ -2453,6 +2453,8 @@ #define S_008F3C_BORDER_COLOR_PTR(x) (((unsigned)(x) & 0xFFF) << 0) #define G_008F3C_BORDER_COLOR_PTR(x) (((x) >> 0) & 0xFFF) #define C_008F3C_BORDER_COLOR_PTR 0xFFFFF000 +/* The UPGRADED_DEPTH field is driver-specific and does not exist in hardware. */ +#define S_008F3C_UPGRADED_DEPTH(x) (((unsigned)(x) & 0x1) << 29) #define S_008F3C_BORDER_COLOR_TYPE(x) (((unsigned)(x) & 0x03) << 30) #define G_008F3C_BORDER_COLOR_TYPE(x) (((x) >> 30) & 0x03) #define C_008F3C_BORDER_COLOR_TYPE 0x3FFFFFFF |