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authorSamuel Pitoiset <[email protected]>2018-11-07 22:05:31 +0100
committerSamuel Pitoiset <[email protected]>2018-11-08 10:41:45 +0100
commitf425d9ee74ce81be3aa9dfefad572d40c5d42372 (patch)
tree4bdf186c9ee128f011a9b4c26072d2179af5f5ed /src/amd/common
parent0dcd99c6870aae5b15c8709a8afcc942d116c976 (diff)
radv: use LOAD_CONTEXT_REG when loading fast clear values
This avoids syncing the Micro Engine. This is only supported for VI+ currently. There is probably a way for using LOAD_CONTEXT_REG on previous chips but that could be done later. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/common')
-rw-r--r--src/amd/common/sid.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
index 5c53133147f..35782046dd5 100644
--- a/src/amd/common/sid.h
+++ b/src/amd/common/sid.h
@@ -217,6 +217,7 @@
#define PKT3_INCREMENT_CE_COUNTER 0x84
#define PKT3_INCREMENT_DE_COUNTER 0x85
#define PKT3_WAIT_ON_CE_COUNTER 0x86
+#define PKT3_LOAD_CONTEXT_REG 0x9F /* new for VI */
#define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30)
#define PKT_TYPE_G(x) (((x) >> 30) & 0x3)