diff options
| author | Marek Olšák <[email protected]> | 2018-05-02 19:48:37 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-05-10 18:40:08 -0400 |
| commit | d26696283d494822f2df72a6b94d51e70f91c4d9 (patch) | |
| tree | 01d40aa5d2897d638c61ac1aa641a8bb410f5fbc /src/amd/common | |
| parent | 125adc92adce078c1a00a25735145dbfb88afc65 (diff) | |
ac/gpu_info: add has_sparse_vm_mappings
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_gpu_info.c | 8 | ||||
| -rw-r--r-- | src/amd/common/ac_gpu_info.h | 1 |
2 files changed, 9 insertions, 0 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 0451b8fb987..7e40ffcf3e7 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -330,6 +330,13 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev, info->has_indirect_compute_dispatch = true; /* SI doesn't support unaligned loads. */ info->has_unaligned_shader_loads = info->chip_class != SI; + /* Disable sparse mappings on SI due to VM faults in CP DMA. Enable them once + * these faults are mitigated in software. + * Disable sparse mappings on GFX9 due to hangs. + */ + info->has_sparse_vm_mappings = + info->chip_class >= CIK && info->chip_class <= VI && + info->drm_minor >= 13; info->num_render_backends = amdinfo->rb_pipes; /* The value returned by the kernel driver was wrong. */ @@ -488,6 +495,7 @@ void ac_print_gpu_info(struct radeon_info *info) printf(" kernel_flushes_tc_l2_after_ib = %u\n", info->kernel_flushes_tc_l2_after_ib); printf(" has_indirect_compute_dispatch = %u\n", info->has_indirect_compute_dispatch); printf(" has_unaligned_shader_loads = %u\n", info->has_unaligned_shader_loads); + printf(" has_sparse_vm_mappings = %u\n", info->has_sparse_vm_mappings); printf("Shader core info:\n"); printf(" max_shader_clock = %i\n", info->max_shader_clock); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index e95dcbd906c..7caa6543695 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -107,6 +107,7 @@ struct radeon_info { bool kernel_flushes_tc_l2_after_ib; bool has_indirect_compute_dispatch; bool has_unaligned_shader_loads; + bool has_sparse_vm_mappings; /* Shader cores. */ uint32_t r600_max_quad_pipes; /* wave size / 16 */ |