diff options
| author | Connor Abbott <[email protected]> | 2019-08-23 10:46:53 +0200 |
|---|---|---|
| committer | Connor Abbott <[email protected]> | 2019-08-26 11:00:49 +0200 |
| commit | b7acf38073b8be8ee17f7618fd9745fca4cabe7a (patch) | |
| tree | d7abc13acc0255e94d8bd7860013e31fbf697589 /src/amd/common | |
| parent | 4849276ea8774329b3330fce22b2bfb03b80c97a (diff) | |
ac/nir: Remove gfx9_stride_size_workaround_for_atomic
The workaround was entirely in common code, and it's needed in radeonsi
too so just always do it when necessary. Fixes
KHR-GL45.shader_image_load_store.advanced-allStages-oneImage on gfx9
with LLVM 8.
Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 2 | ||||
| -rw-r--r-- | src/amd/common/ac_shader_abi.h | 4 |
2 files changed, 1 insertions, 5 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index e71c8f1fee9..d4b30e4a330 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -2503,7 +2503,7 @@ static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx, bool write, bool atomic) { LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write); - if (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic) { + if (ctx->ac.chip_class == GFX9 && HAVE_LLVM < 0x900 && atomic) { LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), ""); LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), ""); stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), ""); diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h index 5d4479c5242..ef628c1ff10 100644 --- a/src/amd/common/ac_shader_abi.h +++ b/src/amd/common/ac_shader_abi.h @@ -207,10 +207,6 @@ struct ac_shader_abi { bool clamp_shadow_reference; bool interp_at_sample_force_center; - /* Whether to workaround GFX9 ignoring the stride for the buffer size if IDXEN=0 - * and LLVM optimizes an indexed load with constant index to IDXEN=0. */ - bool gfx9_stride_size_workaround_for_atomic; - /* Whether bounds checks are required */ bool robust_buffer_access; }; |