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authorMarek Olšák <[email protected]>2019-09-12 19:51:13 -0400
committerMarek Olšák <[email protected]>2019-09-18 14:39:06 -0400
commitaae35fbd3a3eba176ac6fdf6357be49002a561ee (patch)
treefad44d54b291302cca2c50534824fcd3e555b918 /src/amd/common
parent0692ae34e939845e5185d3bdd33ddfe4afcdb995 (diff)
ac: move ac_get_num_physical_vgprs into radeon_info
Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd/common')
-rw-r--r--src/amd/common/ac_gpu_info.c1
-rw-r--r--src/amd/common/ac_gpu_info.h11
2 files changed, 2 insertions, 10 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 9db6c330a1a..6f03732cc16 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -597,6 +597,7 @@ bool ac_query_gpu_info(int fd, void *dev_p,
else
info->num_physical_sgprs_per_simd = 512;
+ info->num_physical_wave64_vgprs_per_simd = info->chip_class >= GFX10 ? 512 : 256;
return true;
}
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 680c588a67a..a21bd51e29d 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -143,6 +143,7 @@ struct radeon_info {
uint32_t max_sh_per_se; /* shader arrays per shader engine */
uint32_t max_wave64_per_simd;
uint32_t num_physical_sgprs_per_simd;
+ uint32_t num_physical_wave64_vgprs_per_simd;
/* Render backends (color + depth blocks). */
uint32_t r300_num_gb_pipes;
@@ -191,16 +192,6 @@ unsigned ac_get_compute_resource_limits(struct radeon_info *info,
unsigned max_waves_per_sh,
unsigned threadgroups_per_cu);
-static inline unsigned ac_get_num_physical_vgprs(enum chip_class chip_class,
- unsigned wave_size)
-{
- /* The number is per SIMD. */
- if (chip_class >= GFX10)
- return wave_size == 32 ? 1024 : 512;
- else
- return 256;
-}
-
#ifdef __cplusplus
}
#endif