diff options
| author | Samuel Pitoiset <[email protected]> | 2019-08-02 12:21:04 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-08-27 08:04:19 +0200 |
| commit | 63c0b89b8f49f2b8c029d206fd18620a19d33e1d (patch) | |
| tree | b34189a509396797b2e34fd22c4e4665e14c1d8a /src/amd/common | |
| parent | 44a46c09deb96040ec25903e58e1ffc297b841c9 (diff) | |
ac: add has_rbplus to ac_gpu_info
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_gpu_info.c | 3 | ||||
| -rw-r--r-- | src/amd/common/ac_gpu_info.h | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index b6b37564c9f..50e92a405e3 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -454,6 +454,9 @@ bool ac_query_gpu_info(int fd, void *dev_p, info->family == CHIP_RENOIR || info->chip_class >= GFX10; + info->has_rbplus = info->family == CHIP_STONEY || + info->chip_class >= GFX9; + /* Get the number of good compute units. */ info->num_good_compute_units = 0; for (i = 0; i < info->max_se; i++) diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 10b578a1ef9..173cc82084a 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -61,6 +61,7 @@ struct radeon_info { bool has_clear_state; bool has_distributed_tess; bool has_dcc_constant_encode; + bool has_rbplus; /* if RB+ registers exist */ /* There are 2 display DCC codepaths, because display expects unaligned DCC. */ /* Disable RB and pipe alignment to skip the retile blit. (1 RB chips only) */ |