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authorTimothy Arceri <tarceri@itsqueeze.com>2018-01-14 10:07:58 +1100
committerTimothy Arceri <tarceri@itsqueeze.com>2018-01-14 11:40:03 +1100
commite6378962ce43727056756a373f5001da041b160e (patch)
tree6322e9026e120a42d5b221d18e67ca2d16ed7f99 /src/amd/common
parent38876c88d1e61d9ec489547dc51ac2026aabddc1 (diff)
ac: add doubles support to isign
Fixes a number of int64 piglit tests, for example: generated_tests/spec/arb_gpu_shader_int64/execution/built-in-functions/fs-sign-i64vec2.shader_test Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Diffstat (limited to 'src/amd/common')
-rw-r--r--src/amd/common/ac_nir_to_llvm.c25
1 files changed, 18 insertions, 7 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 0a0b577735f..6467ed66ae5 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1362,14 +1362,25 @@ static LLVMValueRef emit_fsign(struct ac_llvm_context *ctx,
}
static LLVMValueRef emit_isign(struct ac_llvm_context *ctx,
- LLVMValueRef src0)
+ LLVMValueRef src0, unsigned bitsize)
{
- LLVMValueRef cmp, val;
+ LLVMValueRef cmp, val, zero, one;
+ LLVMTypeRef type;
+
+ if (bitsize == 32) {
+ type = ctx->i32;
+ zero = ctx->i32_0;
+ one = ctx->i32_1;
+ } else {
+ type = ctx->i64;
+ zero = ctx->i64_0;
+ one = ctx->i64_1;
+ }
- cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, ctx->i32_0, "");
- val = LLVMBuildSelect(ctx->builder, cmp, ctx->i32_1, src0, "");
- cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, ctx->i32_0, "");
- val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(ctx->i32, -1, true), "");
+ cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, zero, "");
+ val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
+ cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, zero, "");
+ val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(type, -1, true), "");
return val;
}
@@ -1813,7 +1824,7 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
result = emit_minmax_int(&ctx->ac, LLVMIntULT, src[0], src[1]);
break;
case nir_op_isign:
- result = emit_isign(&ctx->ac, src[0]);
+ result = emit_isign(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
break;
case nir_op_fsign:
src[0] = ac_to_float(&ctx->ac, src[0]);