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authorSamuel Pitoiset <[email protected]>2018-01-12 12:49:28 +0100
committerSamuel Pitoiset <[email protected]>2018-01-15 11:51:47 +0100
commit5ba1a61648e2dea96f621a5886ad8b937a471ab4 (patch)
tree9fe3ad435615fd1f27823e5df7d24b87287521f3 /src/amd/common
parentaebde47840c8ca1fbb32a66df49c2476893ad946 (diff)
ac/shader: gather If TES reads TESSINNER or TESSOUTER
This shouldn't be scanned in the pipeline. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
Diffstat (limited to 'src/amd/common')
-rw-r--r--src/amd/common/ac_nir_to_llvm.c2
-rw-r--r--src/amd/common/ac_nir_to_llvm.h1
-rw-r--r--src/amd/common/ac_shader_info.c4
-rw-r--r--src/amd/common/ac_shader_info.h3
4 files changed, 8 insertions, 2 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 4de31fc812d..cf7035edf1c 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -6310,7 +6310,7 @@ write_tess_factors(struct nir_to_llvm_context *ctx)
16 + tf_offset, 1, 0, true, false);
//store to offchip for TES to read - only if TES reads them
- if (ctx->options->key.tcs.tes_reads_tess_factors) {
+ if (ctx->shader_info->info.tes.reads_tess_factors) {
LLVMValueRef inner_vec, outer_vec, tf_outer_offset;
LLVMValueRef tf_inner_offset;
unsigned param_outer, param_inner;
diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 1737866166e..70cecd6a624 100644
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -55,7 +55,6 @@ struct ac_tcs_variant_key {
struct ac_vs_variant_key vs_key;
unsigned primitive_mode;
unsigned input_vertices;
- uint32_t tes_reads_tess_factors:1;
};
struct ac_fs_variant_key {
diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 5716ec043d5..72612618505 100644
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -106,6 +106,10 @@ gather_intrinsic_info(const nir_intrinsic_instr *instr,
mark_sampler_desc(instr->variables[0]->var, info);
break;
}
+ case nir_intrinsic_load_tess_level_inner:
+ case nir_intrinsic_load_tess_level_outer:
+ info->tes.reads_tess_factors = true;
+ break;
default:
break;
}
diff --git a/src/amd/common/ac_shader_info.h b/src/amd/common/ac_shader_info.h
index 2be61679fc7..fbafeb9f0e7 100644
--- a/src/amd/common/ac_shader_info.h
+++ b/src/amd/common/ac_shader_info.h
@@ -49,6 +49,9 @@ struct ac_shader_info {
bool uses_thread_id[3];
bool uses_local_invocation_idx;
} cs;
+ struct {
+ bool reads_tess_factors;
+ } tes;
};
/* A NIR pass to gather all the info needed to optimise the allocation patterns