diff options
| author | Marek Olšák <[email protected]> | 2018-05-02 19:39:08 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-05-10 18:40:07 -0400 |
| commit | 125adc92adce078c1a00a25735145dbfb88afc65 (patch) | |
| tree | ddc54ca5b9f4b515c77f4efa560c303ff6ea4a8b /src/amd/common | |
| parent | 8b9694da4b5079bca76191678ad34e90651a5fca (diff) | |
ac/gpu_info: add has_unaligned_shader_loads
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_gpu_info.c | 3 | ||||
| -rw-r--r-- | src/amd/common/ac_gpu_info.h | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 5a395772460..0451b8fb987 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -328,6 +328,8 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev, info->kernel_flushes_tc_l2_after_ib = info->chip_class != VI || info->drm_minor >= 2; info->has_indirect_compute_dispatch = true; + /* SI doesn't support unaligned loads. */ + info->has_unaligned_shader_loads = info->chip_class != SI; info->num_render_backends = amdinfo->rb_pipes; /* The value returned by the kernel driver was wrong. */ @@ -485,6 +487,7 @@ void ac_print_gpu_info(struct radeon_info *info) printf(" has_format_bc1_through_bc7 = %u\n", info->has_format_bc1_through_bc7); printf(" kernel_flushes_tc_l2_after_ib = %u\n", info->kernel_flushes_tc_l2_after_ib); printf(" has_indirect_compute_dispatch = %u\n", info->has_indirect_compute_dispatch); + printf(" has_unaligned_shader_loads = %u\n", info->has_unaligned_shader_loads); printf("Shader core info:\n"); printf(" max_shader_clock = %i\n", info->max_shader_clock); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index d5d10c60102..e95dcbd906c 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -106,6 +106,7 @@ struct radeon_info { bool has_format_bc1_through_bc7; bool kernel_flushes_tc_l2_after_ib; bool has_indirect_compute_dispatch; + bool has_unaligned_shader_loads; /* Shader cores. */ uint32_t r600_max_quad_pipes; /* wave size / 16 */ |