diff options
| author | Dave Airlie <[email protected]> | 2017-07-07 06:56:57 +0100 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-07-17 01:43:41 +0100 |
| commit | f8d5b377c8b1452c71d2766becad881f5541cda1 (patch) | |
| tree | 094b155809e241a78284847387fa06c57dd59b15 /src/amd/common | |
| parent | b86f86f55cef4672f23cb50871c8cec03deecbd6 (diff) | |
radv: set cb base tile swizzles for MRT speedups (v4)
This patch uses addrlib to workout the tile swizzles according
to the surface index. It seems to produce the same values as
amdgpu-pro for the deferred test.
v2: don't apply swizzle to CMASK. the eg docs don't mention
it, and we clearly don't align cmask for that.
v3: disable surf index for dedicated images, as these will
most likely be shared, and I don't think the metadata has
space for this info in it yet.
v4: update for shareable images, rename combined_swizzle
to tile_swizzle
This gets the deferred demo from 730->950fps on my rx480.
(dcc cmask elim predication patches get it further)
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_surface.c | 14 | ||||
| -rw-r--r-- | src/amd/common/ac_surface.h | 2 |
2 files changed, 16 insertions, 0 deletions
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index a4df595653b..1677d1b3155 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -692,6 +692,20 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib, surf->htile_size *= 2; surf->is_linear = surf->u.legacy.level[0].mode == RADEON_SURF_MODE_LINEAR_ALIGNED; + + /* workout base swizzle */ + if (!(surf->flags & RADEON_SURF_Z_OR_SBUFFER)) { + ADDR_COMPUTE_BASE_SWIZZLE_INPUT AddrBaseSwizzleIn = {0}; + ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT AddrBaseSwizzleOut = {0}; + + AddrBaseSwizzleIn.surfIndex = config->info.surf_index; + AddrBaseSwizzleIn.tileIndex = AddrSurfInfoIn.tileIndex; + AddrBaseSwizzleIn.macroModeIndex = AddrSurfInfoOut.macroModeIndex; + AddrBaseSwizzleIn.pTileInfo = AddrSurfInfoOut.pTileInfo; + AddrBaseSwizzleIn.tileMode = AddrSurfInfoOut.tileMode; + AddrComputeBaseSwizzle(addrlib, &AddrBaseSwizzleIn, &AddrBaseSwizzleOut); + surf->u.legacy.tile_swizzle = AddrBaseSwizzleOut.tileSwizzle; + } return 0; } diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h index 4d893ff5009..3eaef639aad 100644 --- a/src/amd/common/ac_surface.h +++ b/src/amd/common/ac_surface.h @@ -97,6 +97,7 @@ struct legacy_surf_layout { unsigned depth_adjusted:1; unsigned stencil_adjusted:1; + uint8_t tile_swizzle; struct legacy_surf_level level[RADEON_SURF_MAX_LEVELS]; struct legacy_surf_level stencil_level[RADEON_SURF_MAX_LEVELS]; uint8_t tiling_index[RADEON_SURF_MAX_LEVELS]; @@ -194,6 +195,7 @@ struct ac_surf_info { uint32_t width; uint32_t height; uint32_t depth; + uint32_t surf_index; uint8_t samples; uint8_t levels; uint16_t array_size; |