diff options
| author | Timothy Arceri <[email protected]> | 2018-02-26 22:11:53 +1100 |
|---|---|---|
| committer | Timothy Arceri <[email protected]> | 2018-02-28 09:23:49 +1100 |
| commit | 8de6f7970702ec69143c4e256bbeab64fe7d79c0 (patch) | |
| tree | 8cf7b284764d88da35b0133cb60ee9e5194069d8 /src/amd/common | |
| parent | 7f914734146a3008dc0e5b185f7ccab44a803bc9 (diff) | |
ac/radeonsi: add load_base_vertex() to the abi
Fixes the following piglit tests:
./bin/arb_shader_draw_parameters-basevertex basevertex -auto -fbo
./bin/arb_shader_draw_parameters-basevertex basevertex-baseinstance -auto -fbo
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 8 | ||||
| -rw-r--r-- | src/amd/common/ac_shader_abi.h | 2 |
2 files changed, 9 insertions, 1 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 253c440a328..fabecb17869 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -4389,7 +4389,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx, break; } case nir_intrinsic_load_base_vertex: { - result = ctx->abi->base_vertex; + result = ctx->abi->load_base_vertex(ctx->abi); break; } case nir_intrinsic_load_local_group_size: @@ -4634,6 +4634,11 @@ static void visit_intrinsic(struct ac_nir_context *ctx, } } +static LLVMValueRef radv_load_base_vertex(struct ac_shader_abi *abi) +{ + return abi->base_vertex; +} + static LLVMValueRef radv_load_ssbo(struct ac_shader_abi *abi, LLVMValueRef buffer_ptr, bool write) { @@ -6908,6 +6913,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm, ctx.gs_max_out_vertices = shaders[i]->info.gs.vertices_out; ctx.abi.load_inputs = load_gs_input; ctx.abi.emit_primitive = visit_end_primitive; + ctx.abi.load_base_vertex = radv_load_base_vertex; } else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) { ctx.tcs_outputs_read = shaders[i]->info.outputs_read; ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read; diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h index 10d41ef9971..09fe32c1363 100644 --- a/src/amd/common/ac_shader_abi.h +++ b/src/amd/common/ac_shader_abi.h @@ -182,6 +182,8 @@ struct ac_shader_abi { LLVMValueRef (*load_sample_mask_in)(struct ac_shader_abi *abi); + LLVMValueRef (*load_base_vertex)(struct ac_shader_abi *abi); + /* Whether to clamp the shadow reference value to [0,1]on VI. Radeonsi currently * uses it due to promoting D16 to D32, but radv needs it off. */ bool clamp_shadow_reference; |