diff options
| author | Marek Olšák <[email protected]> | 2019-02-07 00:04:32 -0500 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-07-29 17:52:51 -0400 |
| commit | 19d04191c4e7c2022fb3534d94ad21683feb1604 (patch) | |
| tree | da9326420175a619033d59849ebe06861d48c161 /src/amd/common | |
| parent | c82f33885574e0f8199415b79d6f2b812360b969 (diff) | |
radeonsi: add support for compute-only chips
Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_gpu_info.c | 1 | ||||
| -rw-r--r-- | src/amd/common/ac_gpu_info.h | 1 | ||||
| -rw-r--r-- | src/amd/common/ac_surface.c | 5 |
3 files changed, 6 insertions, 1 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index a501d840b25..f1f31e55abe 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -436,6 +436,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, assert(util_is_power_of_two_or_zero(dma.available_rings + 1)); assert(util_is_power_of_two_or_zero(compute.available_rings + 1)); + info->has_graphics = gfx.available_rings > 0; info->num_sdma_rings = util_bitcount(dma.available_rings); info->num_compute_rings = util_bitcount(compute.available_rings); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 3ec3e44d665..8418a62e387 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -53,6 +53,7 @@ struct radeon_info { enum chip_class chip_class; uint32_t family_id; uint32_t chip_external_rev; + bool has_graphics; /* false if the chip is compute-only */ uint32_t num_compute_rings; uint32_t num_sdma_rings; uint32_t clock_crystal_freq; diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 7d871c47204..53353cdee18 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -658,6 +658,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib, */ AddrSurfInfoIn.flags.dccCompatible = info->chip_class >= GFX8 && + info->has_graphics && /* disable DCC on compute-only chips */ !(surf->flags & RADEON_SURF_Z_OR_SBUFFER) && !(surf->flags & RADEON_SURF_DISABLE_DCC) && !compressed && @@ -1122,7 +1123,9 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib, } /* DCC */ - if (!(surf->flags & RADEON_SURF_DISABLE_DCC) && !compressed && + if (info->has_graphics && + !(surf->flags & RADEON_SURF_DISABLE_DCC) && + !compressed && gfx9_is_dcc_capable(info, in->swizzleMode)) { ADDR2_COMPUTE_DCCINFO_INPUT din = {0}; ADDR2_COMPUTE_DCCINFO_OUTPUT dout = {0}; |