diff options
| author | Samuel Pitoiset <[email protected]> | 2017-12-20 20:55:53 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-12-27 10:24:47 +0100 |
| commit | 3015668cad039994954a9ccce7562a26b046fd73 (patch) | |
| tree | bba6e6bbc2020ebe6070615e432c5bf356e67e8c /src/amd/common | |
| parent | 62942aa8c6b82f537366bb3ace451f5fb54b0edc (diff) | |
amd/common: add declare_tes_input_vgprs() helper
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 078bd2408d7..f48fa1214b8 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -723,6 +723,14 @@ radv_define_vs_user_sgprs_phase2(struct nir_to_llvm_context *ctx, } } +static void +declare_tes_input_vgprs(struct nir_to_llvm_context *ctx, struct arg_info *args) +{ + add_vgpr_argument(args, ctx->ac.f32, &ctx->tes_u); + add_vgpr_argument(args, ctx->ac.f32, &ctx->tes_v); + add_vgpr_argument(args, ctx->ac.i32, &ctx->tes_rel_patch_id); + add_vgpr_argument(args, ctx->ac.i32, &ctx->tes_patch_id); +} static void create_function(struct nir_to_llvm_context *ctx, gl_shader_stage stage, @@ -831,10 +839,7 @@ static void create_function(struct nir_to_llvm_context *ctx, add_sgpr_argument(&args, ctx->ac.i32, NULL); // add_sgpr_argument(&args, ctx->ac.i32, &ctx->oc_lds); // OC LDS } - add_vgpr_argument(&args, ctx->ac.f32, &ctx->tes_u); // tes_u - add_vgpr_argument(&args, ctx->ac.f32, &ctx->tes_v); // tes_v - add_vgpr_argument(&args, ctx->ac.i32, &ctx->tes_rel_patch_id); // tes rel patch id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->tes_patch_id); // tes patch id + declare_tes_input_vgprs(ctx, &args); break; case MESA_SHADER_GEOMETRY: if (has_previous_stage) { @@ -869,10 +874,7 @@ static void create_function(struct nir_to_llvm_context *ctx, add_vgpr_argument(&args, ctx->ac.i32, &ctx->vs_prim_id); // vs prim id add_vgpr_argument(&args, ctx->ac.i32, &ctx->abi.instance_id); // instance id } else { - add_vgpr_argument(&args, ctx->ac.f32, &ctx->tes_u); // tes_u - add_vgpr_argument(&args, ctx->ac.f32, &ctx->tes_v); // tes_v - add_vgpr_argument(&args, ctx->ac.i32, &ctx->tes_rel_patch_id); // tes rel patch id - add_vgpr_argument(&args, ctx->ac.i32, &ctx->tes_patch_id); // tes patch id + declare_tes_input_vgprs(ctx, &args); } } else { radv_define_common_user_sgprs_phase1(ctx, stage, has_previous_stage, previous_stage, &user_sgpr_info, &args, &desc_sets); |