diff options
| author | Marek Olšák <[email protected]> | 2018-09-21 03:36:32 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-10-16 15:28:22 -0400 |
| commit | 6e1cf6532dc7a498a6a04e9fd5f8147aec0d2030 (patch) | |
| tree | 6b08c95f73a203ed46c446bb77a26a30ddef5c6f /src/amd/common | |
| parent | 0fa9e6d7b304f6a8064ed78a4b9c557e1026e7e5 (diff) | |
radeonsi: make si_gfx_write_event_eop more configurable
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/sid.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h index b3321ea3a77..3e36eb2d046 100644 --- a/src/amd/common/sid.h +++ b/src/amd/common/sid.h @@ -181,6 +181,9 @@ #define PKT3_COND_WRITE 0x45 #define PKT3_EVENT_WRITE 0x46 #define PKT3_EVENT_WRITE_EOP 0x47 /* not on GFX9 */ +#define EOP_DST_SEL(x) ((x) << 16) +#define EOP_DST_SEL_MEM 0 +#define EOP_DST_SEL_TC_L2 1 #define EOP_INT_SEL(x) ((x) << 24) #define EOP_INT_SEL_NONE 0 #define EOP_INT_SEL_SEND_DATA_AFTER_WR_CONFIRM 3 @@ -189,6 +192,8 @@ #define EOP_DATA_SEL_VALUE_32BIT 1 #define EOP_DATA_SEL_VALUE_64BIT 2 #define EOP_DATA_SEL_TIMESTAMP 3 +#define EOP_DATA_SEL_GDS 5 +#define EOP_DATA_GDS(dw_offset, num_dwords) ((dw_offset) | ((unsigned)(num_dwords) << 16)) /* CP DMA bug: Any use of CP_DMA.DST_SEL=TC must be avoided when EOS packets * are used. Use DST_SEL=MC instead. For prefetch, use SRC_SEL=TC and * DST_SEL=MC. Only CIK chips are affected. |