diff options
| author | Marek Olšák <[email protected]> | 2019-08-28 17:38:50 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-09-09 23:43:03 -0400 |
| commit | d95afd8b9e7f9b3880813203292257bf0ed7babf (patch) | |
| tree | 2681e0c37b64d770c2d17619485c788d36f34dc9 /src/amd/common | |
| parent | 42ea0b7b52d78fc923e50a0825859fe079fd8c35 (diff) | |
radeonsi/gfx10: fix wave occupancy computations
Cc: 19.2 <[email protected]>
Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_gpu_info.h | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index c850da22d4e..9986d58202a 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -187,7 +187,7 @@ unsigned ac_get_compute_resource_limits(struct radeon_info *info, unsigned max_waves_per_sh, unsigned threadgroups_per_cu); -static inline unsigned ac_get_max_simd_waves(enum radeon_family family) +static inline unsigned ac_get_max_wave64_per_simd(enum radeon_family family) { switch (family) { @@ -202,10 +202,26 @@ static inline unsigned ac_get_max_simd_waves(enum radeon_family family) } } +static inline unsigned ac_get_num_physical_vgprs(enum chip_class chip_class, + unsigned wave_size) +{ + /* The number is per SIMD. */ + if (chip_class >= GFX10) + return wave_size == 32 ? 1024 : 512; + else + return 256; +} + static inline uint32_t -ac_get_num_physical_sgprs(enum chip_class chip_class) +ac_get_num_physical_sgprs(const struct radeon_info *info) { - return chip_class >= GFX8 ? 800 : 512; + /* The number is per SIMD. There is enough SGPRs for the maximum number + * of Wave32, which is double the number for Wave64. + */ + if (info->chip_class >= GFX10) + return 128 * ac_get_max_wave64_per_simd(info->family) * 2; + + return info->chip_class >= GFX8 ? 800 : 512; } #ifdef __cplusplus |