diff options
| author | Dave Airlie <[email protected]> | 2017-01-19 15:14:31 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-01-31 09:30:05 +1000 |
| commit | 4ec294adce93392c015e7b2bbd79a7f9a50990a0 (patch) | |
| tree | f2cb9cd066bf6bfc316ab87d201bbddf251bc6de /src/amd/common | |
| parent | ac642c6195f57c980e5f8c3ec743f5d54e96f1ca (diff) | |
radv/ac: handle emitting vertex outputs to esgs ring.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 38 | ||||
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.h | 1 |
2 files changed, 38 insertions, 1 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 593128867cd..c5c32eb80fd 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -4558,6 +4558,39 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx) } static void +handle_es_outputs_post(struct nir_to_llvm_context *ctx) +{ + int j; + uint64_t max_output_written = 0; + for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) { + LLVMValueRef *out_ptr = &ctx->outputs[i * 4]; + int param_index; + if (!(ctx->output_mask & (1ull << i))) + continue; + + param_index = shader_io_get_unique_index(i); + + if (param_index > max_output_written) + max_output_written = param_index; + + for (j = 0; j < 4; j++) { + LLVMValueRef out_val = LLVMBuildLoad(ctx->builder, out_ptr[j], ""); + out_val = LLVMBuildBitCast(ctx->builder, out_val, ctx->i32, ""); + + build_tbuffer_store(ctx, + ctx->esgs_ring, + out_val, 1, + LLVMGetUndef(ctx->i32), ctx->es2gs_offset, + (4 * param_index + j) * 4, + V_008F0C_BUF_DATA_FORMAT_32, + V_008F0C_BUF_NUM_FORMAT_UINT, + 0, 0, 1, 1, 0); + } + } + ctx->shader_info->vs.esgs_itemsize = (max_output_written + 1) * 16; +} + +static void si_export_mrt_color(struct nir_to_llvm_context *ctx, LLVMValueRef *color, unsigned param, bool is_last) { @@ -4678,7 +4711,10 @@ handle_shader_outputs_post(struct nir_to_llvm_context *ctx) { switch (ctx->stage) { case MESA_SHADER_VERTEX: - handle_vs_outputs_post(ctx); + if (ctx->options->key.vs.as_es) + handle_es_outputs_post(ctx); + else + handle_vs_outputs_post(ctx); break; case MESA_SHADER_FRAGMENT: handle_fs_outputs_post(ctx); diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h index 82c75bf6963..ab6ce5a5c6a 100644 --- a/src/amd/common/ac_nir_to_llvm.h +++ b/src/amd/common/ac_nir_to_llvm.h @@ -105,6 +105,7 @@ struct ac_shader_variant_info { bool as_es; uint8_t clip_dist_mask; uint8_t cull_dist_mask; + uint32_t esgs_itemsize; } vs; struct { unsigned num_interp; |