diff options
author | Marek Olšák <[email protected]> | 2019-01-17 14:27:18 -0500 |
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committer | Marek Olšák <[email protected]> | 2019-01-22 12:14:26 -0500 |
commit | e402961e1dc49031c68a1373620abdaa3b9efbe6 (patch) | |
tree | 22f934eb4a08fbed8b0e4d79763316f1a3550034 /src/amd/common/sid.h | |
parent | c605738113fe91d04f799eae52cec28fafac3f2d (diff) |
radeonsi: correct WRITE_DATA.DST_SEL definitions
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/common/sid.h')
-rw-r--r-- | src/amd/common/sid.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h index 12e80df4884..5c8eee0124d 100644 --- a/src/amd/common/sid.h +++ b/src/amd/common/sid.h @@ -133,11 +133,11 @@ #define S_370_WR_ONE_ADDR(x) (((unsigned)(x) & 0x1) << 16) #define S_370_DST_SEL(x) (((unsigned)(x) & 0xf) << 8) #define V_370_MEM_MAPPED_REGISTER 0 -#define V_370_MEMORY_SYNC 1 +#define V_370_MEM_GRBM 1 /* sync across GRBM */ #define V_370_TC_L2 2 #define V_370_GDS 3 #define V_370_RESERVED 4 -#define V_370_MEM_ASYNC 5 +#define V_370_MEM 5 /* not on SI */ #define R_371_DST_ADDR_LO 0x371 #define R_372_DST_ADDR_HI 0x372 #define PKT3_DRAW_INDEX_INDIRECT_MULTI 0x38 |