diff options
author | Marek Olšák <[email protected]> | 2018-04-30 22:35:51 -0400 |
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committer | Marek Olšák <[email protected]> | 2018-05-10 18:26:33 -0400 |
commit | bdc3e410f75d6fd2a3e979447fd5ab69512fd724 (patch) | |
tree | c3965c5e0af3b5ec1b3b95d2a8a7f011d7e2c9d8 /src/amd/common/ac_surface.h | |
parent | 9bf3570fed064cfc5a863fa4bd4802f11b1030f5 (diff) |
ac/surface: unify common legacy and gfx9 fmask fields
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/amd/common/ac_surface.h')
-rw-r--r-- | src/amd/common/ac_surface.h | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h index d0249684ad2..45fb8045e53 100644 --- a/src/amd/common/ac_surface.h +++ b/src/amd/common/ac_surface.h @@ -80,9 +80,6 @@ struct legacy_surf_level { }; struct legacy_surf_fmask { - uint64_t size; - unsigned alignment; - unsigned tile_swizzle; unsigned slice_tile_max; /* max 4M */ uint8_t tiling_index; /* max 31 */ uint8_t bankh; /* max 8 */ @@ -153,13 +150,9 @@ struct gfx9_surf_layout { uint16_t dcc_pitch_max; /* (mip chain pitch - 1) */ uint64_t stencil_offset; /* separate stencil */ - uint64_t fmask_size; uint64_t cmask_size; - uint32_t fmask_alignment; uint32_t cmask_alignment; - - uint8_t fmask_tile_swizzle; }; struct radeon_surf { @@ -199,8 +192,10 @@ struct radeon_surf { * - depth/stencil if HTILE is not TC-compatible and if the gen is not GFX9 */ uint8_t tile_swizzle; + uint8_t fmask_tile_swizzle; uint64_t surf_size; + uint64_t fmask_size; /* DCC and HTILE are very small. */ uint32_t dcc_size; uint32_t htile_size; @@ -208,6 +203,7 @@ struct radeon_surf { uint32_t htile_slice_size; uint32_t surf_alignment; + uint32_t fmask_alignment; uint32_t dcc_alignment; uint32_t htile_alignment; |