diff options
| author | Marek Olšák <[email protected]> | 2018-06-21 22:50:51 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-06-25 18:33:58 -0400 |
| commit | 3da693b7d98782437c25b1f6c2d0efb3a398246b (patch) | |
| tree | 34ee4de05b7c3693d646e4651b941beb982d4853 /src/amd/common/ac_surface.c | |
| parent | 2d64a68c6f38b6dab8f0d2b8968e009c25bcc9f5 (diff) | |
ac/surface: move cmask_size/alignment into radeon_surf
cmask_size is changed to uint32_t because it can't be greater than 4GB.
Reviewed-by: Timothy Arceri <[email protected]>
Diffstat (limited to 'src/amd/common/ac_surface.c')
| -rw-r--r-- | src/amd/common/ac_surface.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 6a335111314..f5f88c1e791 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -1286,8 +1286,8 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib, surf->u.gfx9.cmask.rb_aligned = cin.cMaskFlags.rbAligned; surf->u.gfx9.cmask.pipe_aligned = cin.cMaskFlags.pipeAligned; - surf->u.gfx9.cmask_size = cout.cmaskBytes; - surf->u.gfx9.cmask_alignment = cout.baseAlign; + surf->cmask_size = cout.cmaskBytes; + surf->cmask_alignment = cout.baseAlign; } } @@ -1428,7 +1428,7 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib, surf->htile_slice_size = 0; surf->u.gfx9.surf_offset = 0; surf->u.gfx9.stencil_offset = 0; - surf->u.gfx9.cmask_size = 0; + surf->cmask_size = 0; /* Calculate texture layout information. */ r = gfx9_compute_miptree(addrlib, config, surf, compressed, |