diff options
| author | Dave Airlie <[email protected]> | 2017-04-18 05:35:05 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-04-19 09:00:42 +1000 |
| commit | 0b62669c8d8f01c68e22e0ef380cdd606c9045dc (patch) | |
| tree | 8015bf6ca34e2a75ce1eb3bb1c24d91856503ff7 /src/amd/common/ac_nir_to_llvm.c | |
| parent | ec4785afb7bbba0627719731ceba05deeb58baac (diff) | |
radv/ac: frag shader only needs ring offsets if sample positions enabled
mostly documenting things, since with modern llvm we always have the
spill enabled.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/common/ac_nir_to_llvm.c')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index b3e522dd732..1ca27d5e701 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -572,10 +572,13 @@ static void create_function(struct nir_to_llvm_context *ctx) ctx->stage == MESA_SHADER_VERTEX || ctx->stage == MESA_SHADER_TESS_CTRL || ctx->stage == MESA_SHADER_TESS_EVAL || - ctx->stage == MESA_SHADER_FRAGMENT || ctx->is_gs_copy_shader) need_ring_offsets = true; + if (ctx->stage == MESA_SHADER_FRAGMENT && + ctx->shader_info->info.ps.needs_sample_positions) + need_ring_offsets = true; + if (need_ring_offsets && !ctx->options->supports_spill) { arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* address of rings */ } |