diff options
| author | Marek Olšák <[email protected]> | 2019-09-12 19:00:23 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-09-18 14:39:06 -0400 |
| commit | 2c62b461e99c0d1d40d5aa16acfdd3df2fb790cd (patch) | |
| tree | cdece3ca5321b81e5f1f116d3e22266b17b4ce17 /src/amd/common/ac_gpu_info.h | |
| parent | 05da025f350cb83e1125d6a931ccf9a87223bb69 (diff) | |
ac: move PBB MAX_ALLOC_COUNT into radeon_info
Reviewed-by: Timothy Arceri <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd/common/ac_gpu_info.h')
| -rw-r--r-- | src/amd/common/ac_gpu_info.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 9986d58202a..555f7175e87 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -66,6 +66,7 @@ struct radeon_info { bool has_load_ctx_reg_pkt; bool has_out_of_order_rast; bool cpdma_prefetch_writes_memory; + uint32_t pbb_max_alloc_count; /* There are 2 display DCC codepaths, because display expects unaligned DCC. */ /* Disable RB and pipe alignment to skip the retile blit. (1 RB chips only) */ |