diff options
| author | Nicolai Hähnle <[email protected]> | 2016-07-27 19:13:57 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-03-30 14:44:33 +0200 |
| commit | 9e40e090891e80856998aed02e63a5d76f2f243a (patch) | |
| tree | 7545b94ca779b7c5be41678c9cf4bb28e9906e49 /src/amd/addrlib/r800 | |
| parent | 6164f23a9140ae8dfa4d44f7a9c41228e36fa9bf (diff) | |
amdgpu/addrlib: add ADDR_ANALYSIS_ASSUME
It helps fix analysis warnings in MSC.
Diffstat (limited to 'src/amd/addrlib/r800')
| -rw-r--r-- | src/amd/addrlib/r800/egbaddrlib.cpp | 2 | ||||
| -rw-r--r-- | src/amd/addrlib/r800/siaddrlib.cpp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/amd/addrlib/r800/egbaddrlib.cpp b/src/amd/addrlib/r800/egbaddrlib.cpp index 03ae41f0677..64c0c6225f5 100644 --- a/src/amd/addrlib/r800/egbaddrlib.cpp +++ b/src/amd/addrlib/r800/egbaddrlib.cpp @@ -4577,7 +4577,7 @@ UINT_64 EgBasedAddrLib::HwlGetSizeAdjustmentMicroTiled( // // R800 will always pad physical slice size to baseAlign which is pipe_interleave_bytes // - ADDR_ASSERT((physicalSliceSize % baseAlign) == 0) + ADDR_ASSERT((physicalSliceSize % baseAlign) == 0); return logicalSliceSize; } diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp index 296391ab46f..5d725e66e1f 100644 --- a/src/amd/addrlib/r800/siaddrlib.cpp +++ b/src/amd/addrlib/r800/siaddrlib.cpp @@ -2151,7 +2151,7 @@ UINT_32 SiAddrLib::HwlPreAdjustBank( bankBit0 = bankBit0 ^ x4 ^ x5; bank |= bankBit0; - ADDR_ASSERT(pTileInfo->macroAspectRatio > 1) + ADDR_ASSERT(pTileInfo->macroAspectRatio > 1); } return bank; |