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| author | Nicolai Hähnle <[email protected]> | 2016-07-20 21:30:56 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-03-30 14:44:33 +0200 |
| commit | fbc9ba7559b15d29cd8dc38dfb3751845ef3fd37 (patch) | |
| tree | a2f41c4e5870de65a0328f0cda3061dc98156c34 /src/amd/addrlib/r800/siaddrlib.h | |
| parent | 145750efba609bc03d6216f9e08fed18bf3a1498 (diff) | |
amdgpu/addrlib: Pad pitch to multiples of 256 for DCC surface on Fiji
The change also modifies function CiLib::HwlPadDimensions to report
adjusted pitch alignment.
Diffstat (limited to 'src/amd/addrlib/r800/siaddrlib.h')
| -rw-r--r-- | src/amd/addrlib/r800/siaddrlib.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h index b63d7e878dc..c40b5460b4f 100644 --- a/src/amd/addrlib/r800/siaddrlib.h +++ b/src/amd/addrlib/r800/siaddrlib.h @@ -241,6 +241,12 @@ protected: virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const; + virtual VOID HwlComputeSurfaceAlignmentsMacroTiled( + AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, + UINT_32 mipLevel, UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, + UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign, + UINT_32* pMacroTileWidth, UINT_32* pMacroTileHeight) const; + // Get equation table pointer and number of equations virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const { |