diff options
| author | Xavi Zhang <[email protected]> | 2016-02-29 01:36:08 -0500 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-03-30 14:44:33 +0200 |
| commit | cb8844392cd34613db2f79edcc5ae2ac68fe5ec0 (patch) | |
| tree | 19e7d53b027f0c55cc119d5e8e3304b5fc32f723 /src/amd/addrlib/r800/siaddrlib.cpp | |
| parent | fe216415c69091ac27a10daafa3cd4ba0e205c6d (diff) | |
amdgpu/addrlib: Check prt flag for PRT_THIN1 extra padding for DCC.
Diffstat (limited to 'src/amd/addrlib/r800/siaddrlib.cpp')
| -rw-r--r-- | src/amd/addrlib/r800/siaddrlib.cpp | 23 |
1 files changed, 9 insertions, 14 deletions
diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp index 299951edc01..c1f6dac15a1 100644 --- a/src/amd/addrlib/r800/siaddrlib.cpp +++ b/src/amd/addrlib/r800/siaddrlib.cpp @@ -3381,22 +3381,17 @@ ADDR_E_RETURNCODE SiLib::HwlGetMaxAlignments( **************************************************************************************************** */ VOID SiLib::HwlComputeSurfaceAlignmentsMacroTiled( - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 bpp, ///< [in] bits per pixel - ADDR_SURFACE_FLAGS flags, ///< [in] surface flags - UINT_32 mipLevel, ///< [in] mip level - UINT_32 numSamples, ///< [in] number of samples - ADDR_TILEINFO* pTileInfo, ///< [in,out] bank structure. - UINT_32* pBaseAlign, ///< [out] base address alignment in bytes - UINT_32* pPitchAlign, ///< [out] pitch alignment in pixels - UINT_32* pHeightAlign, ///< [out] height alignment in pixels - UINT_32* pMacroTileWidth, ///< [out] macro tile width in pixels - UINT_32* pMacroTileHeight ///< [out] macro tile height in pixels + AddrTileMode tileMode, ///< [in] tile mode + UINT_32 bpp, ///< [in] bits per pixel + ADDR_SURFACE_FLAGS flags, ///< [in] surface flags + UINT_32 mipLevel, ///< [in] mip level + UINT_32 numSamples, ///< [in] number of samples + ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in,out] Surface output ) const { if ((mipLevel == 0) && (flags.prt)) { - UINT_32 macroTileSize = (*pMacroTileWidth) * (*pMacroTileHeight) * numSamples * bpp / 8; + UINT_32 macroTileSize = pOut->blockWidth * pOut->blockHeight * numSamples * bpp / 8; if (macroTileSize < PrtTileSize) { @@ -3404,8 +3399,8 @@ VOID SiLib::HwlComputeSurfaceAlignmentsMacroTiled( ADDR_ASSERT((PrtTileSize % macroTileSize) == 0); - *pPitchAlign *= numMacroTiles; - *pBaseAlign *= numMacroTiles; + pOut->pitchAlign *= numMacroTiles; + pOut->baseAlign *= numMacroTiles; } } } |