diff options
author | Nicolai Hähnle <[email protected]> | 2016-07-20 21:31:24 +0200 |
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committer | Marek Olšák <[email protected]> | 2017-03-30 14:44:33 +0200 |
commit | b328e47d3d3cb71e3d5093d20f837fe36ee3bcc1 (patch) | |
tree | e4a5ae772a0a4daf2799bb97491ad1858f205908 /src/amd/addrlib/r800/egbaddrlib.cpp | |
parent | fbc9ba7559b15d29cd8dc38dfb3751845ef3fd37 (diff) |
amdgpu/addrlib: style cleanup
Signed-off-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/amd/addrlib/r800/egbaddrlib.cpp')
-rw-r--r-- | src/amd/addrlib/r800/egbaddrlib.cpp | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/amd/addrlib/r800/egbaddrlib.cpp b/src/amd/addrlib/r800/egbaddrlib.cpp index 9655c47f7a8..f413cfffda9 100644 --- a/src/amd/addrlib/r800/egbaddrlib.cpp +++ b/src/amd/addrlib/r800/egbaddrlib.cpp @@ -892,19 +892,19 @@ BOOL_32 EgBasedLib::ComputeSurfaceAlignmentsMacroTiled( { // this restriction is only for mipmap (mipmap's numSamples must be 1) macroAspectAlign = Max(1u, - m_pipeInterleaveBytes * m_bankInterleave / - (tileSize * pipes * pTileInfo->bankWidth) - ); + m_pipeInterleaveBytes * m_bankInterleave / + (tileSize * pipes * pTileInfo->bankWidth) + ); pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, macroAspectAlign); } valid = HwlReduceBankWidthHeight(tileSize, - bpp, - flags, - numSamples, - bankHeightAlign, - pipes, - pTileInfo); + bpp, + flags, + numSamples, + bankHeightAlign, + pipes, + pTileInfo); // // The required granularity for pitch is the macro tile width. |