diff options
author | Frans Gu <[email protected]> | 2015-08-17 23:56:23 -0400 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2017-03-30 14:44:33 +0200 |
commit | fe216415c69091ac27a10daafa3cd4ba0e205c6d (patch) | |
tree | 954e8b355bd45ad2d56f2fdb0cd8075070eed4cc /src/amd/addrlib/r800/ciaddrlib.cpp | |
parent | 4dd4700612adf7cb089eb667f265b7c55fd6fd7c (diff) |
amdgpu/addrlib: Add new flags minimizePadding and maxBaseAlign
1) minimizePadding - Use 1D tile mode if padded size of 2D is bigger
than 1D
2) maxBaseAlign - Force PRT tile mode if macro block size is bigger than
requested alignment.
Also, related changes to tile mode optimization for needEquation.
Diffstat (limited to 'src/amd/addrlib/r800/ciaddrlib.cpp')
-rw-r--r-- | src/amd/addrlib/r800/ciaddrlib.cpp | 152 |
1 files changed, 106 insertions, 46 deletions
diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index ed7958d3223..7272c49affe 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -871,6 +871,76 @@ AddrTileMode CiLib::HwlDegradeThickTileMode( /** **************************************************************************************************** +* CiLib::HwlOptimizeTileMode +* +* @brief +* Optimize tile mode on CI +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID CiLib::HwlOptimizeTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + AddrTileMode tileMode = pInOut->tileMode; + + // Override 2D/3D macro tile mode to PRT_* tile mode if + // client driver requests this surface is equation compatible + if ((pInOut->flags.needEquation == TRUE) && + (pInOut->numSamples <= 1) && + (IsMacroTiled(tileMode) == TRUE) && + (IsPrtTileMode(tileMode) == FALSE)) + { + UINT_32 thickness = Thickness(tileMode); + + if (pInOut->maxBaseAlign < Block64K) + { + tileMode = (thickness == 1) ? ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; + } + else if (thickness == 1) + { + tileMode = ADDR_TM_PRT_TILED_THIN1; + } + else + { + static const UINT_32 PrtTileBytes = 0x10000; + // First prt thick tile index in the tile mode table + static const UINT_32 PrtThickTileIndex = 22; + ADDR_TILEINFO tileInfo = {0}; + + HwlComputeMacroModeIndex(PrtThickTileIndex, + pInOut->flags, + pInOut->bpp, + pInOut->numSamples, + &tileInfo); + + UINT_32 macroTileBytes = ((pInOut->bpp) >> 3) * 64 * pInOut->numSamples * + thickness * HwlGetPipes(&tileInfo) * + tileInfo.banks * tileInfo.bankWidth * + tileInfo.bankHeight; + + if (macroTileBytes <= PrtTileBytes) + { + tileMode = ADDR_TM_PRT_TILED_THICK; + } + else + { + tileMode = ADDR_TM_PRT_TILED_THIN1; + } + } + } + + if (tileMode != pInOut->tileMode) + { + pInOut->tileMode = tileMode; + } +} + +/** +**************************************************************************************************** * CiLib::HwlOverrideTileMode * * @brief @@ -981,48 +1051,6 @@ VOID CiLib::HwlOverrideTileMode( } } - // Override 2D/3D macro tile mode to PRT_* tile mode if - // client driver requests this surface is equation compatible - if ((pInOut->flags.needEquation == TRUE) && - (pInOut->numSamples <= 1) && - (IsMacroTiled(tileMode) == TRUE) && - (IsPrtTileMode(tileMode) == FALSE)) - { - UINT_32 thickness = Thickness(tileMode); - - if (thickness == 1) - { - tileMode = ADDR_TM_PRT_TILED_THIN1; - } - else - { - static const UINT_32 PrtTileBytes = 0x10000; - // First prt thick tile index in the tile mode table - static const UINT_32 PrtThickTileIndex = 22; - ADDR_TILEINFO tileInfo = {0}; - - HwlComputeMacroModeIndex(PrtThickTileIndex, - pInOut->flags, - pInOut->bpp, - pInOut->numSamples, - &tileInfo); - - UINT_32 macroTileBytes = ((pInOut->bpp) >> 3) * 64 * pInOut->numSamples * - thickness * HwlGetPipes(&tileInfo) * - tileInfo.banks * tileInfo.bankWidth * - tileInfo.bankHeight; - - if (macroTileBytes <= PrtTileBytes) - { - tileMode = ADDR_TM_PRT_TILED_THICK; - } - else - { - tileMode = ADDR_TM_PRT_TILED_THIN1; - } - } - } - if (tileMode != pInOut->tileMode) { pInOut->tileMode = tileMode; @@ -1115,12 +1143,10 @@ VOID CiLib::HwlSelectTileMode( (pInOut->flags.tcCompatible == FALSE)) { pInOut->flags.opt4Space = TRUE; + pInOut->maxBaseAlign = Block64K; // Optimize tile mode if possible - if (OptimizeTileMode(pInOut, &tileMode)) - { - pInOut->tileMode = tileMode; - } + OptimizeTileMode(pInOut); } HwlOverrideTileMode(pInOut); @@ -1128,6 +1154,40 @@ VOID CiLib::HwlSelectTileMode( /** **************************************************************************************************** +* CiLib::HwlSetPrtTileMode +* +* @brief +* Set PRT tile mode. +* +* @return +* N/A +* +**************************************************************************************************** +*/ +VOID CiLib::HwlSetPrtTileMode( + ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut ///< [in,out] input output structure + ) const +{ + AddrTileMode tileMode = pInOut->tileMode; + AddrTileType tileType = pInOut->tileType; + + if (Thickness(tileMode) > 1) + { + tileMode = ADDR_TM_PRT_TILED_THICK; + tileType = (m_settings.isBonaire == TRUE) ? ADDR_NON_DISPLAYABLE : ADDR_THICK; + } + else + { + tileMode = ADDR_TM_PRT_TILED_THIN1; + tileType = (tileType == ADDR_THICK) ? ADDR_NON_DISPLAYABLE : tileType; + } + + pInOut->tileMode = tileMode; + pInOut->tileType = tileType; +} + +/** +**************************************************************************************************** * CiLib::HwlSetupTileInfo * * @brief |