diff options
| author | Frans Gu <[email protected]> | 2016-02-22 22:05:19 -0500 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-03-30 14:44:33 +0200 |
| commit | 680f91e5d47e6147bac1c214e921bf655a4785a3 (patch) | |
| tree | 430ddb2268e4e5ff688daf17a44d463d28d4c9aa /src/amd/addrlib/addrinterface.h | |
| parent | ca88f832224fdf069a7d2c4337d543dd246ed3b9 (diff) | |
amdgpu/addrlib: Add flag to report if a surface can have dcc ram
Diffstat (limited to 'src/amd/addrlib/addrinterface.h')
| -rw-r--r-- | src/amd/addrlib/addrinterface.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index 55f3ebc3f43..a2a36cd1173 100644 --- a/src/amd/addrlib/addrinterface.h +++ b/src/amd/addrlib/addrinterface.h @@ -609,7 +609,8 @@ typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT UINT_32 last2DLevel : 1; ///< TRUE if this is the last 2D(3D) tiled ///< Only meaningful when create flag checkLast2DLevel is set UINT_32 tcCompatible : 1; ///< If the surface can be shader compatible - UINT_32 reserved :30; ///< Reserved bits + UINT_32 dccUnsupport : 1; ///< If the surface can support DCC compressed rendering + UINT_32 reserved :29; ///< Reserved bits }; UINT_32 equationIndex; ///< Equation index in the equation table; |