diff options
| author | Connor Abbott <[email protected]> | 2019-05-29 15:48:06 +0200 |
|---|---|---|
| committer | Connor Abbott <[email protected]> | 2019-05-31 11:02:11 +0200 |
| commit | 6571032af1d2c00150c4a6699a5fc385dd174ab9 (patch) | |
| tree | 0606ec704e3ca84555d64a433a8029d9aea0dcfa /scons | |
| parent | ca19f7639a0fc1da1e8bc6bb638495af1a6a5798 (diff) | |
radeonsi/nir: Correctly handle double TCS/TES varyings
ac expands the store to 32-bit components for us, but we still have to
deal with storing up to 8 components, and when a varying is split across
two vec4 slots we have to calculate the address again for the second
slot, since they aren't adjacent in memory. I didn't do this on the ac
level because we should generate better indexing arithmetic for the lds
store, where slots are contiguous.
Reviewed-by: Timothy Arceri <[email protected]>
Diffstat (limited to 'scons')
0 files changed, 0 insertions, 0 deletions