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authorTopi Pohjolainen <[email protected]>2017-06-28 12:07:32 +0300
committerTopi Pohjolainen <[email protected]>2017-07-22 00:14:16 +0300
commita40f0430347c07bf2d5794642fe02f5dd248a473 (patch)
tree5c3a03cb00d0745d7bae839415596023f3cc2d19 /scons/x11.py
parent75f95c710f6fbb1aac36de179bb9eb02d02dad58 (diff)
intel/isl: Align non-tiled horizontally by cache line
in order to support blit engine. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'scons/x11.py')
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